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| author | Bjorn Helgaas <bhelgaas@google.com> | 2016-06-13 11:01:51 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-08-18 16:04:57 -0500 |
| commit | eec097d43100a8195fd4f678671ecd5d986dd675 (patch) | |
| tree | ec874686b415958f9123b68f4ba0f85bae6b8c86 /include | |
| parent | 9bb04a0c4e261187be904d05c2bcd1da0eebc20c (diff) | |
| download | cachepc-linux-eec097d43100a8195fd4f678671ecd5d986dd675.tar.gz cachepc-linux-eec097d43100a8195fd4f678671ecd5d986dd675.zip | |
PCI: Add pci_enable_ptm() for drivers to enable PTM on endpoints
Add an pci_enable_ptm() interface so drivers can enable PTM.
The PCI core enables PTM on PTM Roots and switches automatically, but we
don't enable PTM on endpoints unless a driver requests it.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/pci.h | 7 | ||||
| -rw-r--r-- | include/uapi/linux/pci_regs.h | 1 |
2 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 96c509fa9d46..9e4b6d6f3c8d 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1407,6 +1407,13 @@ static inline void pci_disable_ats(struct pci_dev *d) { } static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } #endif +#ifdef CONFIG_PCIE_PTM +int pci_enable_ptm(struct pci_dev *dev, u8 *granularity); +#else +static inline int pci_enable_ptm(struct pci_dev *dev, u8 *granularity) +{ return -EINVAL; } +#endif + void pci_cfg_access_lock(struct pci_dev *dev); bool pci_cfg_access_trylock(struct pci_dev *dev); void pci_cfg_access_unlock(struct pci_dev *dev); diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 926fff41b417..72bbe1491cbf 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -967,6 +967,7 @@ /* Precision Time Measurement */ #define PCI_PTM_CAP 0x04 /* PTM Capability */ +#define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */ #define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */ #define PCI_PTM_CTRL 0x08 /* PTM Control */ #define PCI_PTM_CTRL_ENABLE 0x00000001 /* PTM enable */ |