cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sysfs-class-pwm (2584B)


      1What:		/sys/class/pwm/
      2Date:		May 2013
      3KernelVersion:	3.11
      4Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
      5Description:
      6		The pwm/ class sub-directory belongs to the Generic PWM
      7		Framework and provides a sysfs interface for using PWM
      8		channels.
      9
     10What:		/sys/class/pwm/pwmchip<N>/
     11Date:		May 2013
     12KernelVersion:	3.11
     13Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     14Description:
     15		A /sys/class/pwm/pwmchipN directory is created for each
     16		probed PWM controller/chip where N is the base of the
     17		PWM chip.
     18
     19What:		/sys/class/pwm/pwmchip<N>/npwm
     20Date:		May 2013
     21KernelVersion:	3.11
     22Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     23Description:
     24		The number of PWM channels supported by the PWM chip.
     25
     26What:		/sys/class/pwm/pwmchip<N>/export
     27Date:		May 2013
     28KernelVersion:	3.11
     29Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     30Description:
     31		Exports a PWM channel from the PWM chip for sysfs control.
     32		Value is between 0 and /sys/class/pwm/pwmchipN/npwm - 1.
     33
     34What:		/sys/class/pwm/pwmchip<N>/unexport
     35Date:		May 2013
     36KernelVersion:	3.11
     37Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     38Description:
     39		Unexports a PWM channel.
     40
     41What:		/sys/class/pwm/pwmchip<N>/pwmX
     42Date:		May 2013
     43KernelVersion:	3.11
     44Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     45Description:
     46		A /sys/class/pwm/pwmchipN/pwmX directory is created for
     47		each exported PWM channel where X is the exported PWM
     48		channel number.
     49
     50What:		/sys/class/pwm/pwmchip<N>/pwmX/period
     51Date:		May 2013
     52KernelVersion:	3.11
     53Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     54Description:
     55		Sets the PWM signal period in nanoseconds.
     56
     57What:		/sys/class/pwm/pwmchip<N>/pwmX/duty_cycle
     58Date:		May 2013
     59KernelVersion:	3.11
     60Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     61Description:
     62		Sets the PWM signal duty cycle in nanoseconds.
     63
     64What:		/sys/class/pwm/pwmchip<N>/pwmX/polarity
     65Date:		May 2013
     66KernelVersion:	3.11
     67Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     68Description:
     69		Sets the output polarity of the PWM signal to "normal" or
     70		"inversed".
     71
     72What:		/sys/class/pwm/pwmchip<N>/pwmX/enable
     73Date:		May 2013
     74KernelVersion:	3.11
     75Contact:	H Hartley Sweeten <hsweeten@visionengravers.com>
     76Description:
     77		Enable/disable the PWM signal.
     78		0 is disabled
     79		1 is enabled
     80
     81What:		/sys/class/pwm/pwmchip<N>/pwmX/capture
     82Date:		June 2016
     83KernelVersion:	4.8
     84Contact:	Lee Jones <lee.jones@linaro.org>
     85Description:
     86		Capture information about a PWM signal. The output format is a
     87		pair unsigned integers (period and duty cycle), separated by a
     88		single space.