cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sysfs-driver-intel_sdsi (3161B)


      1What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X
      2Date:		Feb 2022
      3KernelVersion:	5.18
      4Contact:	"David E. Box" <david.e.box@linux.intel.com>
      5Description:
      6		This directory contains interface files for accessing Intel
      7		Software Defined Silicon (SDSi) features on a CPU. X
      8		represents the socket instance (though not the socket ID).
      9		The socket ID is determined by reading the registers file
     10		and decoding it per the specification.
     11
     12		Some files communicate with SDSi hardware through a mailbox.
     13		Should the operation fail, one of the following error codes
     14		may be returned:
     15
     16		==========	=====
     17		Error Code	Cause
     18		==========	=====
     19		EIO		General mailbox failure. Log may indicate cause.
     20		EBUSY		Mailbox is owned by another agent.
     21		EPERM		SDSI capability is not enabled in hardware.
     22		EPROTO		Failure in mailbox protocol detected by driver.
     23				See log for details.
     24		EOVERFLOW	For provision commands, the size of the data
     25				exceeds what may be written.
     26		ESPIPE		Seeking is not allowed.
     27		ETIMEDOUT	Failure to complete mailbox transaction in time.
     28		==========	=====
     29
     30What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/guid
     31Date:		Feb 2022
     32KernelVersion:	5.18
     33Contact:	"David E. Box" <david.e.box@linux.intel.com>
     34Description:
     35		(RO) The GUID for the registers file. The GUID identifies
     36		the layout of the registers file in this directory.
     37		Information about the register layouts for a particular GUID
     38		is available at http://github.com/intel/intel-sdsi
     39
     40What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/registers
     41Date:		Feb 2022
     42KernelVersion:	5.18
     43Contact:	"David E. Box" <david.e.box@linux.intel.com>
     44Description:
     45		(RO) Contains information needed by applications to provision
     46		a CPU and monitor status information. The layout of this file
     47		is determined by the GUID in this directory. Information about
     48		the layout for a particular GUID is available at
     49		http://github.com/intel/intel-sdsi
     50
     51What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/provision_akc
     52Date:		Feb 2022
     53KernelVersion:	5.18
     54Contact:	"David E. Box" <david.e.box@linux.intel.com>
     55Description:
     56		(WO) Used to write an Authentication Key Certificate (AKC) to
     57		the SDSi NVRAM for the CPU. The AKC is used to authenticate a
     58		Capability Activation Payload. Mailbox command.
     59
     60What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/provision_cap
     61Date:		Feb 2022
     62KernelVersion:	5.18
     63Contact:	"David E. Box" <david.e.box@linux.intel.com>
     64Description:
     65		(WO) Used to write a Capability Activation Payload (CAP) to the
     66		SDSi NVRAM for the CPU. CAPs are used to activate a given CPU
     67		feature. A CAP is validated by SDSi hardware using a previously
     68		provisioned AKC file. Upon successful authentication, the CPU
     69		configuration is updated. A cold reboot is required to fully
     70		activate the feature. Mailbox command.
     71
     72What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/state_certificate
     73Date:		Feb 2022
     74KernelVersion:	5.18
     75Contact:	"David E. Box" <david.e.box@linux.intel.com>
     76Description:
     77		(RO) Used to read back the current State Certificate for the CPU
     78		from SDSi hardware. The State Certificate contains information
     79		about the current licenses on the CPU. Mailbox command.