cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sysfs-pci.rst (6132B)


      1.. SPDX-License-Identifier: GPL-2.0
      2
      3============================================
      4Accessing PCI device resources through sysfs
      5============================================
      6
      7sysfs, usually mounted at /sys, provides access to PCI resources on platforms
      8that support it.  For example, a given bus might look like this::
      9
     10     /sys/devices/pci0000:17
     11     |-- 0000:17:00.0
     12     |   |-- class
     13     |   |-- config
     14     |   |-- device
     15     |   |-- enable
     16     |   |-- irq
     17     |   |-- local_cpus
     18     |   |-- remove
     19     |   |-- resource
     20     |   |-- resource0
     21     |   |-- resource1
     22     |   |-- resource2
     23     |   |-- revision
     24     |   |-- rom
     25     |   |-- subsystem_device
     26     |   |-- subsystem_vendor
     27     |   `-- vendor
     28     `-- ...
     29
     30The topmost element describes the PCI domain and bus number.  In this case,
     31the domain number is 0000 and the bus number is 17 (both values are in hex).
     32This bus contains a single function device in slot 0.  The domain and bus
     33numbers are reproduced for convenience.  Under the device directory are several
     34files, each with their own function.
     35
     36       =================== =====================================================
     37       file		   function
     38       =================== =====================================================
     39       class		   PCI class (ascii, ro)
     40       config		   PCI config space (binary, rw)
     41       device		   PCI device (ascii, ro)
     42       enable	           Whether the device is enabled (ascii, rw)
     43       irq		   IRQ number (ascii, ro)
     44       local_cpus	   nearby CPU mask (cpumask, ro)
     45       remove		   remove device from kernel's list (ascii, wo)
     46       resource		   PCI resource host addresses (ascii, ro)
     47       resource0..N	   PCI resource N, if present (binary, mmap, rw\ [1]_)
     48       resource0_wc..N_wc  PCI WC map resource N, if prefetchable (binary, mmap)
     49       revision		   PCI revision (ascii, ro)
     50       rom		   PCI ROM resource, if present (binary, ro)
     51       subsystem_device	   PCI subsystem device (ascii, ro)
     52       subsystem_vendor	   PCI subsystem vendor (ascii, ro)
     53       vendor		   PCI vendor (ascii, ro)
     54       =================== =====================================================
     55
     56::
     57
     58  ro - read only file
     59  rw - file is readable and writable
     60  wo - write only file
     61  mmap - file is mmapable
     62  ascii - file contains ascii text
     63  binary - file contains binary data
     64  cpumask - file contains a cpumask type
     65
     66.. [1] rw for IORESOURCE_IO (I/O port) regions only
     67
     68The read only files are informational, writes to them will be ignored, with
     69the exception of the 'rom' file.  Writable files can be used to perform
     70actions on the device (e.g. changing config space, detaching a device).
     71mmapable files are available via an mmap of the file at offset 0 and can be
     72used to do actual device programming from userspace.  Note that some platforms
     73don't support mmapping of certain resources, so be sure to check the return
     74value from any attempted mmap.  The most notable of these are I/O port
     75resources, which also provide read/write access.
     76
     77The 'enable' file provides a counter that indicates how many times the device
     78has been enabled.  If the 'enable' file currently returns '4', and a '1' is
     79echoed into it, it will then return '5'.  Echoing a '0' into it will decrease
     80the count.  Even when it returns to 0, though, some of the initialisation
     81may not be reversed.
     82
     83The 'rom' file is special in that it provides read-only access to the device's
     84ROM file, if available.  It's disabled by default, however, so applications
     85should write the string "1" to the file to enable it before attempting a read
     86call, and disable it following the access by writing "0" to the file.  Note
     87that the device must be enabled for a rom read to return data successfully.
     88In the event a driver is not bound to the device, it can be enabled using the
     89'enable' file, documented above.
     90
     91The 'remove' file is used to remove the PCI device, by writing a non-zero
     92integer to the file.  This does not involve any kind of hot-plug functionality,
     93e.g. powering off the device.  The device is removed from the kernel's list of
     94PCI devices, the sysfs directory for it is removed, and the device will be
     95removed from any drivers attached to it. Removal of PCI root buses is
     96disallowed.
     97
     98Accessing legacy resources through sysfs
     99----------------------------------------
    100
    101Legacy I/O port and ISA memory resources are also provided in sysfs if the
    102underlying platform supports them.  They're located in the PCI class hierarchy,
    103e.g.::
    104
    105	/sys/class/pci_bus/0000:17/
    106	|-- bridge -> ../../../devices/pci0000:17
    107	|-- cpuaffinity
    108	|-- legacy_io
    109	`-- legacy_mem
    110
    111The legacy_io file is a read/write file that can be used by applications to
    112do legacy port I/O.  The application should open the file, seek to the desired
    113port (e.g. 0x3e8) and do a read or a write of 1, 2 or 4 bytes.  The legacy_mem
    114file should be mmapped with an offset corresponding to the memory offset
    115desired, e.g. 0xa0000 for the VGA frame buffer.  The application can then
    116simply dereference the returned pointer (after checking for errors of course)
    117to access legacy memory space.
    118
    119Supporting PCI access on new platforms
    120--------------------------------------
    121
    122In order to support PCI resource mapping as described above, Linux platform
    123code should ideally define ARCH_GENERIC_PCI_MMAP_RESOURCE and use the generic
    124implementation of that functionality. To support the historical interface of
    125mmap() through files in /proc/bus/pci, platforms may also set HAVE_PCI_MMAP.
    126
    127Alternatively, platforms which set HAVE_PCI_MMAP may provide their own
    128implementation of pci_mmap_page_range() instead of defining
    129ARCH_GENERIC_PCI_MMAP_RESOURCE.
    130
    131Platforms which support write-combining maps of PCI resources must define
    132arch_can_pci_mmap_wc() which shall evaluate to non-zero at runtime when
    133write-combining is permitted. Platforms which support maps of I/O resources
    134define arch_can_pci_mmap_io() similarly.
    135
    136Legacy resources are protected by the HAVE_PCI_LEGACY define.  Platforms
    137wishing to support legacy functionality should define it and provide
    138pci_legacy_read, pci_legacy_write and pci_mmap_legacy_page_range functions.