qcom_l2_pmu.rst (1665B)
1===================================================================== 2Qualcomm Technologies Level-2 Cache Performance Monitoring Unit (PMU) 3===================================================================== 4 5This driver supports the L2 cache clusters found in Qualcomm Technologies 6Centriq SoCs. There are multiple physical L2 cache clusters, each with their 7own PMU. Each cluster has one or more CPUs associated with it. 8 9There is one logical L2 PMU exposed, which aggregates the results from 10the physical PMUs. 11 12The driver provides a description of its available events and configuration 13options in sysfs, see /sys/devices/l2cache_0. 14 15The "format" directory describes the format of the events. 16 17Events can be envisioned as a 2-dimensional array. Each column represents 18a group of events. There are 8 groups. Only one entry from each 19group can be in use at a time. If multiple events from the same group 20are specified, the conflicting events cannot be counted at the same time. 21 22Events are specified as 0xCCG, where CC is 2 hex digits specifying 23the code (array row) and G specifies the group (column) 0-7. 24 25In addition there is a cycle counter event specified by the value 0xFE 26which is outside the above scheme. 27 28The driver provides a "cpumask" sysfs attribute which contains a mask 29consisting of one CPU per cluster which will be used to handle all the PMU 30events on that cluster. 31 32Examples for use with perf:: 33 34 perf stat -e l2cache_0/config=0x001/,l2cache_0/config=0x042/ -a sleep 1 35 36 perf stat -e l2cache_0/config=0xfe/ -C 2 sleep 1 37 38The driver does not support sampling, therefore "perf record" will 39not work. Per-task perf sessions are not supported.