cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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memory.rst (3743B)


      1=================================
      2Kernel Memory Layout on ARM Linux
      3=================================
      4
      5		Russell King <rmk@arm.linux.org.uk>
      6
      7		     November 17, 2005 (2.6.15)
      8
      9This document describes the virtual memory layout which the Linux
     10kernel uses for ARM processors.  It indicates which regions are
     11free for platforms to use, and which are used by generic code.
     12
     13The ARM CPU is capable of addressing a maximum of 4GB virtual memory
     14space, and this must be shared between user space processes, the
     15kernel, and hardware devices.
     16
     17As the ARM architecture matures, it becomes necessary to reserve
     18certain regions of VM space for use for new facilities; therefore
     19this document may reserve more VM space over time.
     20
     21=============== =============== ===============================================
     22Start		End		Use
     23=============== =============== ===============================================
     24ffff8000	ffffffff	copy_user_page / clear_user_page use.
     25				For SA11xx and Xscale, this is used to
     26				setup a minicache mapping.
     27
     28ffff4000	ffffffff	cache aliasing on ARMv6 and later CPUs.
     29
     30ffff1000	ffff7fff	Reserved.
     31				Platforms must not use this address range.
     32
     33ffff0000	ffff0fff	CPU vector page.
     34				The CPU vectors are mapped here if the
     35				CPU supports vector relocation (control
     36				register V bit.)
     37
     38fffe0000	fffeffff	XScale cache flush area.  This is used
     39				in proc-xscale.S to flush the whole data
     40				cache. (XScale does not have TCM.)
     41
     42fffe8000	fffeffff	DTCM mapping area for platforms with
     43				DTCM mounted inside the CPU.
     44
     45fffe0000	fffe7fff	ITCM mapping area for platforms with
     46				ITCM mounted inside the CPU.
     47
     48ffc80000	ffefffff	Fixmap mapping region.  Addresses provided
     49				by fix_to_virt() will be located here.
     50
     51ffc00000	ffc7ffff	Guard region
     52
     53ff800000	ffbfffff	Permanent, fixed read-only mapping of the
     54				firmware provided DT blob
     55
     56fee00000	feffffff	Mapping of PCI I/O space. This is a static
     57				mapping within the vmalloc space.
     58
     59VMALLOC_START	VMALLOC_END-1	vmalloc() / ioremap() space.
     60				Memory returned by vmalloc/ioremap will
     61				be dynamically placed in this region.
     62				Machine specific static mappings are also
     63				located here through iotable_init().
     64				VMALLOC_START is based upon the value
     65				of the high_memory variable, and VMALLOC_END
     66				is equal to 0xff800000.
     67
     68PAGE_OFFSET	high_memory-1	Kernel direct-mapped RAM region.
     69				This maps the platforms RAM, and typically
     70				maps all platform RAM in a 1:1 relationship.
     71
     72PKMAP_BASE	PAGE_OFFSET-1	Permanent kernel mappings
     73				One way of mapping HIGHMEM pages into kernel
     74				space.
     75
     76MODULES_VADDR	MODULES_END-1	Kernel module space
     77				Kernel modules inserted via insmod are
     78				placed here using dynamic mappings.
     79
     80TASK_SIZE	MODULES_VADDR-1	KASAn shadow memory when KASan is in use.
     81				The range from MODULES_VADDR to the top
     82				of the memory is shadowed here with 1 bit
     83				per byte of memory.
     84
     8500001000	TASK_SIZE-1	User space mappings
     86				Per-thread mappings are placed here via
     87				the mmap() system call.
     88
     8900000000	00000fff	CPU vector page / null pointer trap
     90				CPUs which do not support vector remapping
     91				place their vector page here.  NULL pointer
     92				dereferences by both the kernel and user
     93				space are also caught via this mapping.
     94=============== =============== ===============================================
     95
     96Please note that mappings which collide with the above areas may result
     97in a non-bootable kernel, or may cause the kernel to (eventually) panic
     98at run time.
     99
    100Since future CPUs may impact the kernel mapping layout, user programs
    101must not access any memory which is not mapped inside their 0x0001000
    102to TASK_SIZE address range.  If they wish to access these areas, they
    103must set up their own mappings using open() and mmap().