bootloader-interface.rst (3806B)
1========================================================== 2Interface between kernel and boot loaders on Exynos boards 3========================================================== 4 5Author: Krzysztof Kozlowski 6 7Date : 6 June 2015 8 9The document tries to describe currently used interface between Linux kernel 10and boot loaders on Samsung Exynos based boards. This is not a definition 11of interface but rather a description of existing state, a reference 12for information purpose only. 13 14In the document "boot loader" means any of following: U-boot, proprietary 15SBOOT or any other firmware for ARMv7 and ARMv8 initializing the board before 16executing kernel. 17 18 191. Non-Secure mode 20 21Address: sysram_ns_base_addr 22 23============= ============================================ ================== 24Offset Value Purpose 25============= ============================================ ================== 260x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend 270x0c 0x00000bad (Magic cookie) System suspend 280x1c exynos4_secondary_startup Secondary CPU boot 290x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot 300x20 0xfcba0d10 (Magic cookie) AFTR 310x24 exynos_cpu_resume_ns AFTR 320x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR 330x28 0x0 or last value during resume (Exynos542x) System suspend 34============= ============================================ ================== 35 36 372. Secure mode 38 39Address: sysram_base_addr 40 41============= ============================================ ================== 42Offset Value Purpose 43============= ============================================ ================== 440x00 exynos4_secondary_startup Secondary CPU boot 450x04 exynos4_secondary_startup (Exynos542x) Secondary CPU boot 464*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot 470x20 exynos_cpu_resume (Exynos4210 r1.0) AFTR 480x24 0xfcba0d10 (Magic cookie, Exynos4210 r1.0) AFTR 49============= ============================================ ================== 50 51Address: pmu_base_addr 52 53============= ============================================ ================== 54Offset Value Purpose 55============= ============================================ ================== 560x0800 exynos_cpu_resume AFTR, suspend 570x0800 mcpm_entry_point (Exynos542x with MCPM) AFTR, suspend 580x0804 0xfcba0d10 (Magic cookie) AFTR 590x0804 0x00000bad (Magic cookie) System suspend 600x0814 exynos4_secondary_startup (Exynos4210 r1.1) Secondary CPU boot 610x0818 0xfcba0d10 (Magic cookie, Exynos4210 r1.1) AFTR 620x081C exynos_cpu_resume (Exynos4210 r1.1) AFTR 63============= ============================================ ================== 64 653. Other (regardless of secure/non-secure mode) 66 67Address: pmu_base_addr 68 69============= =============================== =============================== 70Offset Value Purpose 71============= =============================== =============================== 720x0908 Non-zero Secondary CPU boot up indicator 73 on Exynos3250 and Exynos542x 74============= =============================== =============================== 75 76 774. Glossary 78 79AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other 80modules are power gated, except the TOP modules 81MCPM - Multi-Cluster Power Management