cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nuvoton,npcm750-smp (999B)


      1=========================================================
      2Secondary CPU enable-method "nuvoton,npcm750-smp" binding
      3=========================================================
      4
      5To apply to all CPUs, a single "nuvoton,npcm750-smp" enable method should be
      6defined in the "cpus" node.
      7
      8Enable method name:	"nuvoton,npcm750-smp"
      9Compatible machines:	"nuvoton,npcm750"
     10Compatible CPUs:	"arm,cortex-a9"
     11Related properties:	(none)
     12
     13Note:
     14This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
     15"nuvoton,npcm750-gcr".
     16
     17Example:
     18
     19	cpus {
     20		#address-cells = <1>;
     21		#size-cells = <0>;
     22		enable-method = "nuvoton,npcm750-smp";
     23
     24		cpu@0 {
     25			device_type = "cpu";
     26			compatible = "arm,cortex-a9";
     27			clocks = <&clk NPCM7XX_CLK_CPU>;
     28			clock-names = "clk_cpu";
     29			reg = <0>;
     30			next-level-cache = <&L2>;
     31		};
     32
     33		cpu@1 {
     34			device_type = "cpu";
     35			compatible = "arm,cortex-a9";
     36			clocks = <&clk NPCM7XX_CLK_CPU>;
     37			clock-names = "clk_cpu";
     38			reg = <1>;
     39			next-level-cache = <&L2>;
     40		};
     41	};
     42