cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,saw2.txt (2028B)

      1SPM AVS Wrapper 2 (SAW2)
      2
      3The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
      4Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
      5power-controller that transitions a piece of hardware (like a processor or
      6subsystem) into and out of low power modes via a direct connection to
      7the PMIC. It can also be wired up to interact with other processors in the
      8system, notifying them when a low power state is entered or exited.
      9
     10Multiple revisions of the SAW hardware are supported using these Device Nodes.
     11SAW2 revisions differ in the register offset and configuration data. Also, the
     12same revision of the SAW in different SoCs may have different configuration
     13data due the the differences in hardware capabilities. Hence the SoC name, the
     14version of the SAW hardware in that SoC and the distinction between cpu (big
     15or Little) or cache, may be needed to uniquely identify the SAW register
     16configuration and initialization data. The compatible string is used to
     17indicate this parameter.
     18
     19PROPERTIES
     20
     21- compatible:
     22	Usage: required
     23	Value type: <string>
     24	Definition: Must have
     25			"qcom,saw2"
     26		    A more specific value could be one of:
     27			"qcom,apq8064-saw2-v1.1-cpu"
     28			"qcom,msm8226-saw2-v2.1-cpu"
     29			"qcom,msm8974-saw2-v2.1-cpu"
     30			"qcom,apq8084-saw2-v2.1-cpu"
     31
     32- reg:
     33	Usage: required
     34	Value type: <prop-encoded-array>
     35	Definition: the first element specifies the base address and size of
     36		    the register region. An optional second element specifies
     37		    the base address and size of the alias register region.
     38
     39- regulator:
     40	Usage: optional
     41	Value type: boolean
     42	Definition: Indicates that this SPM device acts as a regulator device
     43			device for the core (CPU or Cache) the SPM is attached
     44			to.
     45
     46Example 1:
     47
     48	power-controller@2099000 {
     49		compatible = "qcom,saw2";
     50		reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
     51		regulator;
     52	};
     53
     54Example 2:
     55	saw0: power-controller@f9089000 {
     56		compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
     57		reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
     58	};