cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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l3-noc.txt (719B)


      1* TI - L3 Network On Chip (NoC)
      2
      3This version is an implementation of the generic NoC IP
      4provided by Arteris.
      5
      6Required properties:
      7- compatible : Should be "ti,omap3-l3-smx" for OMAP3 family
      8               Should be "ti,omap4-l3-noc" for OMAP4 family
      9               Should be "ti,omap5-l3-noc" for OMAP5 family
     10	       Should be "ti,dra7-l3-noc" for DRA7 family
     11               Should be "ti,am4372-l3-noc" for AM43 family
     12- reg:	Contains L3 register address range for each noc domain.
     13- ti,hwmods: "l3_main_1", ... One hwmod for each noc domain.
     14
     15Examples:
     16
     17ocp {
     18	compatible = "ti,omap4-l3-noc", "simple-bus";
     19	#address-cells = <1>;
     20	#size-cells = <1>;
     21	ranges;
     22	ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
     23};