cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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l4.txt (1531B)


      1L4 interconnect bindings
      2
      3These bindings describe the OMAP SoCs L4 interconnect bus.
      4
      5Required properties:
      6- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
      7	       Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
      8	       Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
      9	       Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus
     10	       Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus
     11	       Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus
     12	       Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus
     13	       Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus
     14	       Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus
     15	       Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus
     16	       Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus
     17	       Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus
     18- ranges : contains the IO map range for the bus
     19- reg : registers link agent and interconnect agent and access protection
     20- reg-names : "la" for link agent, "ia0" to "ia3" for one to three
     21              interconnect agent instances, "ap" for access if it exists
     22
     23Examples:
     24
     25l4: interconnect@48000000 {
     26	compatible "ti,omap4-l4-per", "simple-bus";
     27	reg = <0x48000000 0x800>,
     28	      <0x48000800 0x800>,
     29	      <0x48001000 0x400>,
     30	      <0x48001400 0x400>,
     31	      <0x48001800 0x400>,
     32	      <0x48001c00 0x400>;
     33	reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
     34	#address-cells = <1>;
     35	#size-cells = <1>;
     36	ranges = <0 0x48000000 0x100000>;
     37};