cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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prcm.txt (1483B)


      1OMAP PRCM bindings
      2
      3Power Reset and Clock Manager lists the device clocks and clockdomains under
      4a DT hierarchy. Each TI SoC can have multiple PRCM entities listed for it,
      5each describing one module and the clock hierarchy under it. see [1] for
      6documentation about the individual clock/clockdomain nodes.
      7
      8[1] Documentation/devicetree/bindings/clock/ti/*
      9
     10Required properties:
     11- compatible:	Must be one of:
     12		"ti,am3-prcm"
     13		"ti,am4-prcm"
     14		"ti,omap2-prcm"
     15		"ti,omap3-prm"
     16		"ti,omap3-cm"
     17		"ti,omap4-cm1"
     18		"ti,omap4-prm"
     19		"ti,omap4-cm2"
     20		"ti,omap4-scrm"
     21		"ti,omap5-prm"
     22		"ti,omap5-cm-core-aon"
     23		"ti,omap5-scrm"
     24		"ti,omap5-cm-core"
     25		"ti,dra7-prm"
     26		"ti,dra7-cm-core-aon"
     27		"ti,dra7-cm-core"
     28		"ti,dm814-prcm"
     29		"ti,dm816-prcm"
     30- reg:		Contains PRCM module register address range
     31		(base address and length)
     32- clocks:	clocks for this module
     33- clockdomains:	clockdomains for this module
     34- #clock-cells: From common clock binding
     35- clock-output-names: From common clock binding
     36
     37
     38Example:
     39
     40cm: clock@48004000 {
     41	compatible = "ti,omap3-cm";
     42	reg = <0x48004000 0x4000>;
     43	#clock-cells = <0>;
     44	clock-output-names = "cm";
     45
     46	cm_clocks: clocks {
     47		#address-cells = <1>;
     48		#size-cells = <0>;
     49	};
     50
     51	cm_clockdomains: clockdomains {
     52	};
     53}
     54
     55&cm_clocks {
     56	omap2_32k_fck: omap_32k_fck {
     57		#clock-cells = <0>;
     58		compatible = "fixed-clock";
     59		clock-frequency = <32768>;
     60	};
     61};
     62
     63&cm_clockdomains {
     64	core_l3_clkdm: core_l3_clkdm {
     65		compatible = "ti,clockdomain";
     66		clocks = <&sdrc_ick>;
     67	};
     68};