cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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renesas,prr.yaml (798B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/arm/renesas,prr.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Renesas Product Register
      8
      9maintainers:
     10  - Geert Uytterhoeven <geert+renesas@glider.be>
     11  - Magnus Damm <magnus.damm@gmail.com>
     12
     13description: |
     14  Most Renesas ARM SoCs have a Product Register or Boundary Scan ID
     15  Register that allows to retrieve SoC product and revision information.
     16  If present, a device node for this register should be added.
     17
     18properties:
     19  compatible:
     20    enum:
     21      - renesas,prr
     22      - renesas,bsid
     23  reg:
     24    maxItems: 1
     25
     26required:
     27  - compatible
     28  - reg
     29
     30additionalProperties: false
     31
     32examples:
     33  - |
     34    prr: chipid@ff000044 {
     35        compatible = "renesas,prr";
     36        reg = <0xff000044 4>;
     37    };