cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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vexpress-scc.txt (1193B)


      1ARM Versatile Express Serial Configuration Controller
      2-----------------------------------------------------
      3
      4Test chips for ARM Versatile Express platform implement SCC (Serial
      5Configuration Controller) interface, used to set initial conditions
      6for the test chip.
      7
      8In some cases its registers are also mapped in normal address space
      9and can be used to obtain runtime information about the chip internals
     10(like silicon temperature sensors) and as interface to other subsystems
     11like platform configuration control and power management.
     12
     13Required properties:
     14
     15- compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc";
     16		    where <model> is the full tile model name (as used
     17		    in the tile's Technical Reference Manual),
     18		    eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7):
     19	compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
     20
     21Optional properties:
     22
     23- reg: when the SCC is memory mapped, physical address and size of the
     24       registers window
     25- interrupts: when the SCC can generate a system-level interrupt
     26
     27Example:
     28
     29	scc@7fff0000 {
     30		compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
     31		reg = <0 0x7fff0000 0 0x1000>;
     32		interrupts = <0 95 4>;
     33	};