cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-sata.txt (897B)

      1* Freescale 8xxx/3.0 Gb/s SATA nodes
      2
      3SATA nodes are defined to describe on-chip Serial ATA controllers.
      4Each SATA port should have its own node.
      5
      6Required properties:
      7- compatible        : compatible list, contains 2 entries, first is
      8		 "fsl,CHIP-sata", where CHIP is the processor
      9		 (mpc8315, mpc8379, etc.) and the second is
     10		 "fsl,pq-sata"
     11- interrupts        : <interrupt mapping for SATA IRQ>
     12- cell-index        : controller index.
     13                          1 for controller @ 0x18000
     14                          2 for controller @ 0x19000
     15                          3 for controller @ 0x1a000
     16                          4 for controller @ 0x1b000
     17
     18Optional properties:
     19- reg               : <registers mapping>
     20
     21Example:
     22	sata@18000 {
     23		compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
     24		reg = <0x18000 0x1000>;
     25		cell-index = <1>;
     26		interrupts = <2c 8>;
     27		interrupt-parent = < &ipic >;
     28	};