cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun50i-a64-de2.yaml (1903B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Allwinner A64 Display Engine Bus Device Tree Bindings
      8
      9maintainers:
     10  - Chen-Yu Tsai <wens@csie.org>
     11  - Maxime Ripard <mripard@kernel.org>
     12
     13properties:
     14  $nodename:
     15    pattern: "^bus(@[0-9a-f]+)?$"
     16
     17  "#address-cells":
     18    const: 1
     19
     20  "#size-cells":
     21    const: 1
     22
     23  compatible:
     24    oneOf:
     25      - const: allwinner,sun50i-a64-de2
     26      - items:
     27          - const: allwinner,sun50i-h6-de3
     28          - const: allwinner,sun50i-a64-de2
     29
     30  reg:
     31    maxItems: 1
     32
     33  allwinner,sram:
     34    description:
     35      The SRAM that needs to be claimed to access the display engine
     36      bus.
     37    $ref: /schemas/types.yaml#/definitions/phandle-array
     38    items:
     39      - items:
     40          - description: phandle to SRAM
     41          - description: register value for device
     42
     43  ranges: true
     44
     45patternProperties:
     46  # All other properties should be child nodes with unit-address and 'reg'
     47  "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$":
     48    type: object
     49    properties:
     50      reg:
     51        maxItems: 1
     52
     53    required:
     54      - reg
     55
     56required:
     57  - compatible
     58  - reg
     59  - "#address-cells"
     60  - "#size-cells"
     61  - ranges
     62  - allwinner,sram
     63
     64additionalProperties: false
     65
     66examples:
     67  - |
     68    bus@1000000 {
     69        compatible = "allwinner,sun50i-a64-de2";
     70        reg = <0x1000000 0x400000>;
     71        allwinner,sram = <&de2_sram 1>;
     72        #address-cells = <1>;
     73        #size-cells = <1>;
     74        ranges = <0 0x1000000 0x400000>;
     75
     76        display_clocks: clock@0 {
     77            compatible = "allwinner,sun50i-a64-de2-clk";
     78            reg = <0x0 0x100000>;
     79            clocks = <&ccu 52>, <&ccu 99>;
     80            clock-names = "bus", "mod";
     81            resets = <&ccu 30>;
     82            #clock-cells = <1>;
     83            #reset-cells = <1>;
     84        };
     85    };
     86
     87...