cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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airoha,en7523-scu.yaml (1449B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/airoha,en7523-scu.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: EN7523 Clock Device Tree Bindings
      8
      9maintainers:
     10  - Felix Fietkau <nbd@nbd.name>
     11  - John Crispin <nbd@nbd.name>
     12
     13description: |
     14  This node defines the System Control Unit of the EN7523 SoC,
     15  a collection of registers configuring many different aspects of the SoC.
     16
     17  The clock driver uses it to read and configure settings of the
     18  PLL controller, which provides clocks for the CPU, the bus and
     19  other SoC internal peripherals.
     20
     21  Each clock is assigned an identifier and client nodes use this identifier
     22  to specify which clock they consume.
     23
     24  All these identifiers can be found in:
     25  [1]: <include/dt-bindings/clock/en7523-clk.h>.
     26
     27  The clocks are provided inside a system controller node.
     28
     29properties:
     30  compatible:
     31    items:
     32      - const: airoha,en7523-scu
     33
     34  reg:
     35    maxItems: 2
     36
     37  "#clock-cells":
     38    description:
     39      The first cell indicates the clock number, see [1] for available
     40      clocks.
     41    const: 1
     42
     43required:
     44  - compatible
     45  - reg
     46  - '#clock-cells'
     47
     48additionalProperties: false
     49
     50examples:
     51  - |
     52    #include <dt-bindings/clock/en7523-clk.h>
     53    scu: system-controller@1fa20000 {
     54      compatible = "airoha,en7523-scu";
     55      reg = <0x1fa20000 0x400>,
     56            <0x1fb00000 0x1000>;
     57      #clock-cells = <1>;
     58    };