cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun4i-a10-mod1-clk.yaml (1157B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod1-clk.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Allwinner A10 Module 1 Clock Device Tree Bindings
      8
      9maintainers:
     10  - Chen-Yu Tsai <wens@csie.org>
     11  - Maxime Ripard <mripard@kernel.org>
     12
     13deprecated: true
     14
     15properties:
     16  "#clock-cells":
     17    const: 0
     18
     19  compatible:
     20    const: allwinner,sun4i-a10-mod1-clk
     21
     22  reg:
     23    maxItems: 1
     24
     25  clocks:
     26    maxItems: 4
     27    description: >
     28      The parent order must match the hardware programming order.
     29
     30  clock-output-names:
     31    maxItems: 1
     32
     33required:
     34  - "#clock-cells"
     35  - compatible
     36  - reg
     37  - clocks
     38  - clock-output-names
     39
     40additionalProperties: false
     41
     42examples:
     43  - |
     44    #include <dt-bindings/clock/sun4i-a10-pll2.h>
     45
     46    clk@1c200c0 {
     47        #clock-cells = <0>;
     48        compatible = "allwinner,sun4i-a10-mod1-clk";
     49        reg = <0x01c200c0 0x4>;
     50        clocks = <&pll2 SUN4I_A10_PLL2_8X>,
     51                 <&pll2 SUN4I_A10_PLL2_4X>,
     52                 <&pll2 SUN4I_A10_PLL2_2X>,
     53                 <&pll2 SUN4I_A10_PLL2_1X>;
     54        clock-output-names = "spdif";
     55    };
     56
     57...