cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun8i-a83t-de2-clk.yaml (1622B)

      1# SPDX-License-Identifier: GPL-2.0+
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Allwinner A83t Display Engine 2/3 Clock Controller Device Tree Bindings
      8
      9maintainers:
     10  - Chen-Yu Tsai <wens@csie.org>
     11  - Maxime Ripard <mripard@kernel.org>
     12
     13properties:
     14  "#clock-cells":
     15    const: 1
     16
     17  "#reset-cells":
     18    const: 1
     19
     20  compatible:
     21    oneOf:
     22      - const: allwinner,sun8i-a83t-de2-clk
     23      - const: allwinner,sun8i-h3-de2-clk
     24      - const: allwinner,sun8i-v3s-de2-clk
     25      - const: allwinner,sun50i-a64-de2-clk
     26      - const: allwinner,sun50i-h5-de2-clk
     27      - const: allwinner,sun50i-h6-de3-clk
     28      - items:
     29          - const: allwinner,sun8i-r40-de2-clk
     30          - const: allwinner,sun8i-h3-de2-clk
     31
     32  reg:
     33    maxItems: 1
     34
     35  clocks:
     36    items:
     37      - description: Bus Clock
     38      - description: Module Clock
     39
     40  clock-names:
     41    items:
     42      - const: bus
     43      - const: mod
     44
     45  resets:
     46    maxItems: 1
     47
     48required:
     49  - "#clock-cells"
     50  - "#reset-cells"
     51  - compatible
     52  - reg
     53  - clocks
     54  - clock-names
     55  - resets
     56
     57additionalProperties: false
     58
     59examples:
     60  - |
     61    #include <dt-bindings/clock/sun8i-h3-ccu.h>
     62    #include <dt-bindings/reset/sun8i-h3-ccu.h>
     63
     64    de2_clocks: clock@1000000 {
     65        compatible = "allwinner,sun8i-h3-de2-clk";
     66        reg = <0x01000000 0x100000>;
     67        clocks = <&ccu CLK_BUS_DE>,
     68                 <&ccu CLK_DE>;
     69        clock-names = "bus",
     70                      "mod";
     71        resets = <&ccu RST_BUS_DE>;
     72        #clock-cells = <1>;
     73        #reset-cells = <1>;
     74    };
     75
     76...