amlogic,gxbb-aoclkc.txt (2436B)
1* Amlogic GXBB AO Clock and Reset Unit 2 3The Amlogic GXBB AO clock controller generates and supplies clock to various 4controllers within the Always-On part of the SoC. 5 6Required Properties: 7 8- compatible: value should be different for each SoC family as : 9 - GXBB (S905) : "amlogic,meson-gxbb-aoclkc" 10 - GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc" 11 - GXM (S912) : "amlogic,meson-gxm-aoclkc" 12 - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc" 13 - G12A (S905X2, S905D2, S905Y2) : "amlogic,meson-g12a-aoclkc" 14 followed by the common "amlogic,meson-gx-aoclkc" 15- clocks: list of clock phandle, one for each entry clock-names. 16- clock-names: should contain the following: 17 * "xtal" : the platform xtal 18 * "mpeg-clk" : the main clock controller mother clock (aka clk81) 19 * "ext-32k-0" : external 32kHz reference #0 if any (optional) 20 * "ext-32k-1" : external 32kHz reference #1 if any (optional - gx only) 21 * "ext-32k-2" : external 32kHz reference #2 if any (optional - gx only) 22 23- #clock-cells: should be 1. 24 25Each clock is assigned an identifier and client nodes can use this identifier 26to specify the clock which they consume. All available clocks are defined as 27preprocessor macros in the dt-bindings/clock/gxbb-aoclkc.h header and can be 28used in device tree sources. 29 30- #reset-cells: should be 1. 31 32Each reset is assigned an identifier and client nodes can use this identifier 33to specify the reset which they consume. All available resets are defined as 34preprocessor macros in the dt-bindings/reset/gxbb-aoclkc.h header and can be 35used in device tree sources. 36 37Parent node should have the following properties : 38- compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd" 39- reg: base address and size of the AO system control register space. 40 41Example: AO Clock controller node: 42 43ao_sysctrl: sys-ctrl@0 { 44 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"; 45 reg = <0x0 0x0 0x0 0x100>; 46 47 clkc_AO: clock-controller { 48 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; 49 #clock-cells = <1>; 50 #reset-cells = <1>; 51 clocks = <&xtal>, <&clkc CLKID_CLK81>; 52 clock-names = "xtal", "mpeg-clk"; 53 }; 54 55Example: UART controller node that consumes the clock and reset generated 56 by the clock controller: 57 58 uart_AO: serial@4c0 { 59 compatible = "amlogic,meson-uart"; 60 reg = <0x4c0 0x14>; 61 interrupts = <0 90 1>; 62 clocks = <&clkc_AO CLKID_AO_UART1>; 63 resets = <&clkc_AO RESET_AO_UART1>; 64 };