armada3700-periph-clock.txt (2246B)
1* Peripheral Clock bindings for Marvell Armada 37xx SoCs 2 3Marvell Armada 37xx SoCs provide peripheral clocks which are 4used as clock source for the peripheral of the SoC. 5 6There are two different blocks associated to north bridge and south 7bridge. 8 9The peripheral clock consumer should specify the desired clock by 10having the clock ID in its "clocks" phandle cell. 11 12The following is a list of provided IDs for Armada 3700 North bridge clocks: 13ID Clock name Description 14----------------------------------- 150 mmc MMC controller 161 sata_host Sata Host 172 sec_at Security AT 183 sac_dap Security DAP 194 tsecm Security Engine 205 setm_tmx Serial Embedded Trace Module 216 avs Adaptive Voltage Scaling 227 sqf SPI 238 pwm PWM 249 i2c_2 I2C 2 2510 i2c_1 I2C 1 2611 ddr_phy DDR PHY 2712 ddr_fclk DDR F clock 2813 trace Trace 2914 counter Counter 3015 eip97 EIP 97 3116 cpu CPU 32 33The following is a list of provided IDs for Armada 3700 South bridge clocks: 34ID Clock name Description 35----------------------------------- 360 gbe-50 50 MHz parent clock for Gigabit Ethernet 371 gbe-core parent clock for Gigabit Ethernet core 382 gbe-125 125 MHz parent clock for Gigabit Ethernet 393 gbe1-50 50 MHz clock for Gigabit Ethernet port 1 404 gbe0-50 50 MHz clock for Gigabit Ethernet port 0 415 gbe1-125 125 MHz clock for Gigabit Ethernet port 1 426 gbe0-125 125 MHz clock for Gigabit Ethernet port 0 437 gbe1-core Gigabit Ethernet core port 1 448 gbe0-core Gigabit Ethernet core port 0 459 gbe-bm Gigabit Ethernet Buffer Manager 4610 sdio SDIO 4711 usb32-sub2-sys USB 2 clock 4812 usb32-ss-sys USB 3 clock 4913 pcie PCIe controller 50 51Required properties: 52 53- compatible : shall be "marvell,armada-3700-periph-clock-nb" for the 54 north bridge block, or 55 "marvell,armada-3700-periph-clock-sb" for the south bridge block 56- reg : must be the register address of North/South Bridge Clock register 57- #clock-cells : from common clock binding; shall be set to 1 58 59- clocks : list of the parent clock phandle in the following order: 60 TBG-A P, TBG-B P, TBG-A S, TBG-B S and finally the xtal clock. 61 62 63Example: 64 65nb_perih_clk: nb-periph-clk@13000{ 66 compatible = "marvell,armada-3700-periph-clock-nb"; 67 reg = <0x13000 0x1000>; 68 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, 69 <&tbg 3>, <&xtalclk>; 70 #clock-cells = <1>; 71};