cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada3700-tbg-clock.txt (773B)


      1* Time Base Generator Clock bindings for Marvell Armada 37xx SoCs
      2
      3Marvell Armada 37xx SoCs provide Time Base Generator clocks which are
      4used as parent clocks for the peripheral clocks.
      5
      6The TBG clock consumer should specify the desired clock by having the
      7clock ID in its "clocks" phandle cell.
      8
      9The following is a list of provided IDs and clock names on Armada 3700:
     10 0 = TBG A P
     11 1 = TBG B P
     12 2 = TBG A S
     13 3 = TBG B S
     14
     15Required properties:
     16- compatible : shall be "marvell,armada-3700-tbg-clock"
     17- reg : must be the register address of North Bridge PLL register
     18- #clock-cells : from common clock binding; shall be set to 1
     19
     20Example:
     21
     22tbg: tbg@13200 {
     23	compatible = "marvell,armada-3700-tbg-clock";
     24	reg = <0x13200 0x1000>;
     25	clocks = <&xtalclk>;
     26	#clock-cells = <1>;
     27};