cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

axs10x-i2s-pll-clock.txt (672B)

      1Binding for the AXS10X I2S PLL clock
      2
      3This binding uses the common clock binding[1].
      4
      5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
      6
      7Required properties:
      8- compatible: shall be "snps,axs10x-i2s-pll-clock"
      9- reg : address and length of the I2S PLL register set.
     10- clocks: shall be the input parent clock phandle for the PLL.
     11- #clock-cells: from common clock binding; Should always be set to 0.
     12
     13Example:
     14	pll_clock: pll_clock {
     15		compatible = "fixed-clock";
     16		clock-frequency = <27000000>;
     17		#clock-cells = <0>;
     18	};
     19
     20	i2s_clock@100a0 {
     21		compatible = "snps,axs10x-i2s-pll-clock";
     22		reg = <0x100a0 0x10>;
     23		clocks = <&pll_clock>;
     24		#clock-cells = <0>;
     25	};