cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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brcm,kona-ccu.txt (5724B)


      1Broadcom Kona Family Clocks
      2
      3This binding is associated with Broadcom SoCs having "Kona" style
      4clock control units (CCUs).  A CCU is a clock provider that manages
      5a set of clock signals.  Each CCU is represented by a node in the
      6device tree.
      7
      8This binding uses the common clock binding:
      9    Documentation/devicetree/bindings/clock/clock-bindings.txt
     10
     11Required properties:
     12- compatible
     13	Shall have a value of the form "brcm,<model>-<which>-ccu",
     14	where <model> is a Broadcom SoC model number and <which> is
     15	the name of a defined CCU.  For example:
     16	    "brcm,bcm11351-root-ccu"
     17	The compatible strings used for each supported SoC family
     18	are defined below.
     19- reg
     20	Shall define the base and range of the address space
     21	containing clock control registers
     22- #clock-cells
     23	Shall have value <1>.  The permitted clock-specifier values
     24	are defined below.
     25- clock-output-names
     26	Shall be an ordered list of strings defining the names of
     27	the clocks provided by the CCU.
     28
     29Device tree example:
     30
     31	slave_ccu: slave_ccu {
     32		compatible = "brcm,bcm11351-slave-ccu";
     33		reg = <0x3e011000 0x0f00>;
     34		#clock-cells = <1>;
     35		clock-output-names = "uartb",
     36				     "uartb2",
     37				     "uartb3",
     38				     "uartb4";
     39	};
     40
     41	ref_crystal_clk: ref_crystal {
     42		#clock-cells = <0>;
     43		compatible = "fixed-clock";
     44		clock-frequency = <26000000>;
     45	};
     46
     47	uart@3e002000 {
     48		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
     49		reg = <0x3e002000 0x1000>;
     50		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
     51		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
     52		reg-shift = <2>;
     53		reg-io-width = <4>;
     54	};
     55
     56BCM281XX family
     57---------------
     58CCU compatible string values for SoCs in the BCM281XX family are:
     59    "brcm,bcm11351-root-ccu"
     60    "brcm,bcm11351-aon-ccu"
     61    "brcm,bcm11351-hub-ccu"
     62    "brcm,bcm11351-master-ccu"
     63    "brcm,bcm11351-slave-ccu"
     64
     65The following table defines the set of CCUs and clock specifiers for
     66BCM281XX family clocks.  When a clock consumer references a clocks,
     67its symbolic specifier (rather than its numeric index value) should
     68be used.  These specifiers are defined in:
     69    "include/dt-bindings/clock/bcm281xx.h"
     70
     71    CCU     Clock           Type    Index   Specifier
     72    ---     -----           ----    -----   ---------
     73    root    frac_1m         peri      0     BCM281XX_ROOT_CCU_FRAC_1M
     74
     75    aon     hub_timer       peri      0     BCM281XX_AON_CCU_HUB_TIMER
     76    aon     pmu_bsc         peri      1     BCM281XX_AON_CCU_PMU_BSC
     77    aon     pmu_bsc_var     peri      2     BCM281XX_AON_CCU_PMU_BSC_VAR
     78
     79    hub     tmon_1m         peri      0     BCM281XX_HUB_CCU_TMON_1M
     80
     81    master  sdio1           peri      0     BCM281XX_MASTER_CCU_SDIO1
     82    master  sdio2           peri      1     BCM281XX_MASTER_CCU_SDIO2
     83    master  sdio3           peri      2     BCM281XX_MASTER_CCU_SDIO3
     84    master  sdio4           peri      3     BCM281XX_MASTER_CCU_SDIO4
     85    master  dmac            peri      4     BCM281XX_MASTER_CCU_DMAC
     86    master  usb_ic          peri      5     BCM281XX_MASTER_CCU_USB_IC
     87    master  hsic2_48m       peri      6     BCM281XX_MASTER_CCU_HSIC_48M
     88    master  hsic2_12m       peri      7     BCM281XX_MASTER_CCU_HSIC_12M
     89
     90    slave   uartb           peri      0     BCM281XX_SLAVE_CCU_UARTB
     91    slave   uartb2          peri      1     BCM281XX_SLAVE_CCU_UARTB2
     92    slave   uartb3          peri      2     BCM281XX_SLAVE_CCU_UARTB3
     93    slave   uartb4          peri      3     BCM281XX_SLAVE_CCU_UARTB4
     94    slave   ssp0            peri      4     BCM281XX_SLAVE_CCU_SSP0
     95    slave   ssp2            peri      5     BCM281XX_SLAVE_CCU_SSP2
     96    slave   bsc1            peri      6     BCM281XX_SLAVE_CCU_BSC1
     97    slave   bsc2            peri      7     BCM281XX_SLAVE_CCU_BSC2
     98    slave   bsc3            peri      8     BCM281XX_SLAVE_CCU_BSC3
     99    slave   pwm             peri      9     BCM281XX_SLAVE_CCU_PWM
    100
    101
    102BCM21664 family
    103---------------
    104CCU compatible string values for SoCs in the BCM21664 family are:
    105    "brcm,bcm21664-root-ccu"
    106    "brcm,bcm21664-aon-ccu"
    107    "brcm,bcm21664-master-ccu"
    108    "brcm,bcm21664-slave-ccu"
    109
    110The following table defines the set of CCUs and clock specifiers for
    111BCM21664 family clocks.  When a clock consumer references a clocks,
    112its symbolic specifier (rather than its numeric index value) should
    113be used.  These specifiers are defined in:
    114    "include/dt-bindings/clock/bcm21664.h"
    115
    116    CCU     Clock           Type    Index   Specifier
    117    ---     -----           ----    -----   ---------
    118    root    frac_1m         peri      0     BCM21664_ROOT_CCU_FRAC_1M
    119
    120    aon     hub_timer       peri      0     BCM21664_AON_CCU_HUB_TIMER
    121
    122    master  sdio1           peri      0     BCM21664_MASTER_CCU_SDIO1
    123    master  sdio2           peri      1     BCM21664_MASTER_CCU_SDIO2
    124    master  sdio3           peri      2     BCM21664_MASTER_CCU_SDIO3
    125    master  sdio4           peri      3     BCM21664_MASTER_CCU_SDIO4
    126    master  sdio1_sleep     peri      4     BCM21664_MASTER_CCU_SDIO1_SLEEP
    127    master  sdio2_sleep     peri      5     BCM21664_MASTER_CCU_SDIO2_SLEEP
    128    master  sdio3_sleep     peri      6     BCM21664_MASTER_CCU_SDIO3_SLEEP
    129    master  sdio4_sleep     peri      7     BCM21664_MASTER_CCU_SDIO4_SLEEP
    130
    131    slave   uartb           peri      0     BCM21664_SLAVE_CCU_UARTB
    132    slave   uartb2          peri      1     BCM21664_SLAVE_CCU_UARTB2
    133    slave   uartb3          peri      2     BCM21664_SLAVE_CCU_UARTB3
    134    slave   uartb4          peri      3     BCM21664_SLAVE_CCU_UARTB4
    135    slave   bsc1            peri      4     BCM21664_SLAVE_CCU_BSC1
    136    slave   bsc2            peri      5     BCM21664_SLAVE_CCU_BSC2
    137    slave   bsc3            peri      6     BCM21664_SLAVE_CCU_BSC3
    138    slave   bsc4            peri      7     BCM21664_SLAVE_CCU_BSC4