cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6sl-clock.yaml (1154B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/imx6sl-clock.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Clock bindings for Freescale i.MX6 SoloLite
      8
      9maintainers:
     10  - Anson Huang <Anson.Huang@nxp.com>
     11
     12properties:
     13  compatible:
     14    const: fsl,imx6sl-ccm
     15
     16  reg:
     17    maxItems: 1
     18
     19  interrupts:
     20    description: CCM provides 2 interrupt requests, request 1 is to generate
     21      interrupt for frequency or mux change, request 2 is to generate
     22      interrupt for oscillator read or PLL lock.
     23    items:
     24      - description: CCM interrupt request 1
     25      - description: CCM interrupt request 2
     26
     27  '#clock-cells':
     28    const: 1
     29
     30required:
     31  - compatible
     32  - reg
     33  - interrupts
     34  - '#clock-cells'
     35
     36additionalProperties: false
     37
     38examples:
     39  # Clock Control Module node:
     40  - |
     41    #include <dt-bindings/interrupt-controller/arm-gic.h>
     42
     43    clock-controller@20c4000 {
     44        compatible = "fsl,imx6sl-ccm";
     45        reg = <0x020c4000 0x4000>;
     46        interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
     47                     <0 88 IRQ_TYPE_LEVEL_HIGH>;
     48        #clock-cells = <1>;
     49    };