cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

imx6sx-clock.yaml (1755B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/imx6sx-clock.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Clock bindings for Freescale i.MX6 SoloX
      8
      9maintainers:
     10  - Anson Huang <Anson.Huang@nxp.com>
     11
     12properties:
     13  compatible:
     14    const: fsl,imx6sx-ccm
     15
     16  reg:
     17    maxItems: 1
     18
     19  interrupts:
     20    description: CCM provides 2 interrupt requests, request 1 is to generate
     21      interrupt for frequency or mux change, request 2 is to generate
     22      interrupt for oscillator read or PLL lock.
     23    items:
     24      - description: CCM interrupt request 1
     25      - description: CCM interrupt request 2
     26
     27  '#clock-cells':
     28    const: 1
     29
     30  clocks:
     31    items:
     32      - description: 32k osc
     33      - description: 24m osc
     34      - description: ipp_di0 clock input
     35      - description: ipp_di1 clock input
     36      - description: anaclk1 clock input
     37      - description: anaclk2 clock input
     38
     39  clock-names:
     40    items:
     41      - const: ckil
     42      - const: osc
     43      - const: ipp_di0
     44      - const: ipp_di1
     45      - const: anaclk1
     46      - const: anaclk2
     47
     48required:
     49  - compatible
     50  - reg
     51  - interrupts
     52  - '#clock-cells'
     53  - clocks
     54  - clock-names
     55
     56additionalProperties: false
     57
     58examples:
     59  # Clock Control Module node:
     60  - |
     61    #include <dt-bindings/interrupt-controller/arm-gic.h>
     62
     63    clock-controller@20c4000 {
     64        compatible = "fsl,imx6sx-ccm";
     65        reg = <0x020c4000 0x4000>;
     66        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
     67                     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
     68        #clock-cells = <1>;
     69        clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
     70        clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
     71    };