cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx7d-clock.yaml (1424B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/imx7d-clock.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Clock bindings for Freescale i.MX7 Dual
      8
      9maintainers:
     10  - Frank Li <Frank.Li@nxp.com>
     11  - Anson Huang <Anson.Huang@nxp.com>
     12
     13description: |
     14  The clock consumer should specify the desired clock by having the clock
     15  ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx7d-clock.h
     16  for the full list of i.MX7 Dual clock IDs.
     17
     18properties:
     19  compatible:
     20    const: fsl,imx7d-ccm
     21
     22  reg:
     23    maxItems: 1
     24
     25  interrupts:
     26    items:
     27      - description: CCM interrupt request 1
     28      - description: CCM interrupt request 2
     29
     30  '#clock-cells':
     31    const: 1
     32
     33  clocks:
     34    items:
     35      - description: 32k osc
     36      - description: 24m osc
     37
     38  clock-names:
     39    items:
     40      - const: ckil
     41      - const: osc
     42
     43required:
     44  - compatible
     45  - reg
     46  - interrupts
     47  - clocks
     48  - clock-names
     49  - '#clock-cells'
     50
     51additionalProperties: false
     52
     53examples:
     54  - |
     55    #include <dt-bindings/interrupt-controller/arm-gic.h>
     56
     57    clock-controller@30380000 {
     58        compatible = "fsl,imx7d-ccm";
     59        reg = <0x30380000 0x10000>;
     60        interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
     61                     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
     62        #clock-cells = <1>;
     63        clocks = <&ckil>, <&osc>;
     64        clock-names = "ckil", "osc";
     65    };