cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

marvell,pxa1928.txt (870B)


      1* Marvell PXA1928 Clock Controllers
      2
      3The PXA1928 clock subsystem generates and supplies clock to various
      4controllers within the PXA1928 SoC. The PXA1928 contains 3 clock controller
      5blocks called APMU, MPMU, and APBC roughly corresponding to internal buses.
      6
      7Required Properties:
      8
      9- compatible: should be one of the following.
     10  - "marvell,pxa1928-apmu" - APMU controller compatible
     11  - "marvell,pxa1928-mpmu" - MPMU controller compatible
     12  - "marvell,pxa1928-apbc" - APBC controller compatible
     13- reg: physical base address of the clock controller and length of memory mapped
     14  region.
     15- #clock-cells: should be 1.
     16- #reset-cells: should be 1.
     17
     18Each clock is assigned an identifier and client nodes use the clock controller
     19phandle and this identifier to specify the clock which they consume.
     20
     21All these identifiers can be found in <dt-bindings/clock/marvell,pxa1928.h>.