cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mediatek,topckgen.yaml (1560B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: "http://devicetree.org/schemas/clock/mediatek,topckgen.yaml#"
      5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      6
      7title: MediaTek Top Clock Generator Controller
      8
      9maintainers:
     10  - Michael Turquette <mturquette@baylibre.com>
     11  - Stephen Boyd <sboyd@kernel.org>
     12
     13description:
     14  The Mediatek topckgen controller provides various clocks to the system.
     15  The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
     16
     17properties:
     18  compatible:
     19    oneOf:
     20      - enum:
     21          - mediatek,mt6797-topckgen
     22          - mediatek,mt7622-topckgen
     23          - mediatek,mt8135-topckgen
     24          - mediatek,mt8173-topckgen
     25          - mediatek,mt8516-topckgen
     26      - items:
     27          - const: mediatek,mt7623-topckgen
     28          - const: mediatek,mt2701-topckgen
     29          - const: syscon
     30      - items:
     31          - enum:
     32              - mediatek,mt2701-topckgen
     33              - mediatek,mt2712-topckgen
     34              - mediatek,mt6765-topckgen
     35              - mediatek,mt6779-topckgen
     36              - mediatek,mt7629-topckgen
     37              - mediatek,mt7986-topckgen
     38              - mediatek,mt8167-topckgen
     39              - mediatek,mt8183-topckgen
     40          - const: syscon
     41
     42  reg:
     43    maxItems: 1
     44
     45  '#clock-cells':
     46    const: 1
     47
     48required:
     49  - compatible
     50  - reg
     51  - '#clock-cells'
     52
     53additionalProperties: false
     54
     55examples:
     56  - |
     57    topckgen: clock-controller@10000000 {
     58        compatible = "mediatek,mt8173-topckgen";
     59        reg = <0x10000000 0x1000>;
     60        #clock-cells = <1>;
     61    };