cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mstar,msc313-cpupll.yaml (913B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: MStar/Sigmastar MSC313 CPU PLL
      8
      9maintainers:
     10  - Daniel Palmer <daniel@thingy.jp>
     11
     12description: |
     13  The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable
     14  PLL that can be used as the clock source for the CPU(s).
     15
     16properties:
     17  compatible:
     18    const: mstar,msc313-cpupll
     19
     20  "#clock-cells":
     21    const: 1
     22
     23  clocks:
     24    maxItems: 1
     25
     26  reg:
     27    maxItems: 1
     28
     29required:
     30  - compatible
     31  - "#clock-cells"
     32  - clocks
     33  - reg
     34
     35additionalProperties: false
     36
     37examples:
     38  - |
     39    #include <dt-bindings/clock/mstar-msc313-mpll.h>
     40    cpupll: cpupll@206400 {
     41        compatible = "mstar,msc313-cpupll";
     42        reg = <0x206400 0x200>;
     43        #clock-cells = <1>;
     44        clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
     45    };