cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mstar,msc313-mpll.yaml (922B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: MStar/Sigmastar MSC313 MPLL
      8
      9maintainers:
     10  - Daniel Palmer <daniel@thingy.jp>
     11
     12description: |
     13  The MStar/SigmaStar MSC313 and later ARMv7 chips have an MPLL block that
     14  takes the external xtal input and multiplies it to create a high
     15  frequency clock and divides that down into a number of clocks that
     16  peripherals use.
     17
     18properties:
     19  compatible:
     20    const: mstar,msc313-mpll
     21
     22  "#clock-cells":
     23    const: 1
     24
     25  clocks:
     26    maxItems: 1
     27
     28  reg:
     29    maxItems: 1
     30
     31required:
     32  - compatible
     33  - "#clock-cells"
     34  - clocks
     35  - reg
     36
     37additionalProperties: false
     38
     39examples:
     40  - |
     41    mpll@206000 {
     42        compatible = "mstar,msc313-mpll";
     43        reg = <0x206000 0x200>;
     44        #clock-cells = <1>;
     45        clocks = <&xtal>;
     46    };