cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nspire-clock.txt (696B)


      1TI-NSPIRE Clocks
      2
      3Required properties:
      4- compatible: Valid compatible properties include:
      5	"lsi,nspire-cx-ahb-divider" for the AHB divider in the CX model
      6	"lsi,nspire-classic-ahb-divider" for the AHB divider in the older model
      7	"lsi,nspire-cx-clock" for the base clock in the CX model
      8	"lsi,nspire-classic-clock" for the base clock in the older model
      9
     10- reg: Physical base address of the controller and length of memory mapped
     11	region.
     12
     13Optional:
     14- clocks: For the "nspire-*-ahb-divider" compatible clocks, this is the parent
     15	clock where it divides the rate from.
     16
     17Example:
     18
     19ahb_clk {
     20	#clock-cells = <0>;
     21	compatible = "lsi,nspire-cx-clock";
     22	reg = <0x900B0000 0x4>;
     23	clocks = <&base_clk>;
     24};