cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,gcc-ipq8064.yaml (1739B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064
      8
      9allOf:
     10  - $ref: qcom,gcc.yaml#
     11
     12maintainers:
     13  - Ansuel Smith <ansuelsmth@gmail.com>
     14
     15description: |
     16  Qualcomm global clock control module which supports the clocks, resets and
     17  power domains on IPQ8064.
     18
     19  See also:
     20  - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
     21  - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
     22
     23properties:
     24  compatible:
     25    items:
     26      - const: qcom,gcc-ipq8064
     27      - const: syscon
     28
     29  clocks:
     30    items:
     31      - description: PXO source
     32      - description: CXO source
     33
     34  clock-names:
     35    items:
     36      - const: pxo
     37      - const: cxo
     38
     39  thermal-sensor:
     40    type: object
     41
     42    allOf:
     43      - $ref: /schemas/thermal/qcom-tsens.yaml#
     44
     45required:
     46  - compatible
     47  - clocks
     48  - clock-names
     49
     50unevaluatedProperties: false
     51
     52examples:
     53  - |
     54    #include <dt-bindings/interrupt-controller/arm-gic.h>
     55
     56    gcc: clock-controller@900000 {
     57      compatible = "qcom,gcc-ipq8064", "syscon";
     58      reg = <0x00900000 0x4000>;
     59      clocks = <&pxo_board>, <&cxo_board>;
     60      clock-names = "pxo", "cxo";
     61      #clock-cells = <1>;
     62      #reset-cells = <1>;
     63      #power-domain-cells = <1>;
     64
     65      tsens: thermal-sensor {
     66        compatible = "qcom,ipq8064-tsens";
     67
     68        nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
     69        nvmem-cell-names = "calib", "calib_backup";
     70        interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
     71        interrupt-names = "uplow";
     72
     73        #qcom,sensors = <11>;
     74        #thermal-sensor-cells = <1>;
     75      };
     76    };