cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,gcc-msm8994.yaml (1337B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8994.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Global Clock & Reset Controller Binding for MSM8994
      8
      9maintainers:
     10  - Konrad Dybcio <konrad.dybcio@somainline.org>
     11
     12description: |
     13  Qualcomm global clock control module which supports the clocks, resets and
     14  power domains on MSM8994 and MSM8992.
     15
     16  See also:
     17  - dt-bindings/clock/qcom,gcc-msm8994.h
     18
     19properties:
     20  compatible:
     21    enum:
     22      - qcom,gcc-msm8992
     23      - qcom,gcc-msm8994
     24
     25  clocks:
     26    items:
     27      - description: Board XO source
     28      - description: Sleep clock source
     29
     30  clock-names:
     31    items:
     32      - const: xo
     33      - const: sleep
     34
     35  '#clock-cells':
     36    const: 1
     37
     38  '#reset-cells':
     39    const: 1
     40
     41  '#power-domain-cells':
     42    const: 1
     43
     44  reg:
     45    maxItems: 1
     46
     47required:
     48  - compatible
     49  - clocks
     50  - clock-names
     51  - reg
     52  - '#clock-cells'
     53  - '#reset-cells'
     54  - '#power-domain-cells'
     55
     56additionalProperties: false
     57
     58examples:
     59  - |
     60    clock-controller@300000 {
     61      compatible = "qcom,gcc-msm8994";
     62      reg = <0x00300000 0x90000>;
     63      clocks = <&xo_board>, <&sleep_clk>;
     64      clock-names = "xo", "sleep";
     65      #clock-cells = <1>;
     66      #reset-cells = <1>;
     67      #power-domain-cells = <1>;
     68    };
     69
     70...