cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,gcc-msm8996.yaml (1353B)

      1# SPDX-License-Identifier: GPL-2.0-only
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Global Clock & Reset Controller Binding for MSM8996
      8
      9maintainers:
     10  - Stephen Boyd <sboyd@kernel.org>
     11  - Taniya Das <tdas@codeaurora.org>
     12
     13description: |
     14  Qualcomm global clock control module which supports the clocks, resets and
     15  power domains on MSM8996.
     16
     17  See also:
     18  - dt-bindings/clock/qcom,gcc-msm8996.h
     19
     20properties:
     21  compatible:
     22    const: qcom,gcc-msm8996
     23
     24  clocks:
     25    items:
     26      - description: XO source
     27      - description: Second XO source
     28      - description: Sleep clock source
     29
     30  clock-names:
     31    items:
     32      - const: cxo
     33      - const: cxo2
     34      - const: sleep_clk
     35
     36  '#clock-cells':
     37    const: 1
     38
     39  '#reset-cells':
     40    const: 1
     41
     42  '#power-domain-cells':
     43    const: 1
     44
     45  reg:
     46    maxItems: 1
     47
     48  protected-clocks:
     49    description:
     50      Protected clock specifier list as per common clock binding.
     51
     52required:
     53  - compatible
     54  - reg
     55  - '#clock-cells'
     56  - '#reset-cells'
     57  - '#power-domain-cells'
     58
     59additionalProperties: false
     60
     61examples:
     62  - |
     63    clock-controller@300000 {
     64      compatible = "qcom,gcc-msm8996";
     65      #clock-cells = <1>;
     66      #reset-cells = <1>;
     67      #power-domain-cells = <1>;
     68      reg = <0x300000 0x90000>;
     69    };
     70...