cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom,gcc-sc7180.yaml (1611B)

      1# SPDX-License-Identifier: GPL-2.0-only
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,gcc-sc7180.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Global Clock & Reset Controller Binding for SC7180
      8
      9maintainers:
     10  - Stephen Boyd <sboyd@kernel.org>
     11  - Taniya Das <tdas@codeaurora.org>
     12
     13description: |
     14  Qualcomm global clock control module which supports the clocks, resets and
     15  power domains on SC7180.
     16
     17  See also:
     18  - dt-bindings/clock/qcom,gcc-sc7180.h
     19
     20properties:
     21  compatible:
     22    const: qcom,gcc-sc7180
     23
     24  clocks:
     25    items:
     26      - description: Board XO source
     27      - description: Board active XO source
     28      - description: Sleep clock source
     29
     30  clock-names:
     31    items:
     32      - const: bi_tcxo
     33      - const: bi_tcxo_ao
     34      - const: sleep_clk
     35
     36  '#clock-cells':
     37    const: 1
     38
     39  '#reset-cells':
     40    const: 1
     41
     42  '#power-domain-cells':
     43    const: 1
     44
     45  reg:
     46    maxItems: 1
     47
     48  protected-clocks:
     49    description:
     50      Protected clock specifier list as per common clock binding.
     51
     52required:
     53  - compatible
     54  - clocks
     55  - clock-names
     56  - reg
     57  - '#clock-cells'
     58  - '#reset-cells'
     59  - '#power-domain-cells'
     60
     61additionalProperties: false
     62
     63examples:
     64  - |
     65    #include <dt-bindings/clock/qcom,rpmh.h>
     66    clock-controller@100000 {
     67      compatible = "qcom,gcc-sc7180";
     68      reg = <0x00100000 0x1f0000>;
     69      clocks = <&rpmhcc RPMH_CXO_CLK>,
     70               <&rpmhcc RPMH_CXO_CLK_A>,
     71               <&sleep_clk>;
     72      clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
     73      #clock-cells = <1>;
     74      #reset-cells = <1>;
     75      #power-domain-cells = <1>;
     76    };
     77...