cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom,gcc-sc8180x.yaml (1611B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,gcc-sc8180x.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Global Clock & Reset Controller Binding for SC8180x
      8
      9maintainers:
     10  - Bjorn Andersson <bjorn.andersson@linaro.org>
     11
     12description: |
     13  Qualcomm global clock control module which supports the clocks, resets and
     14  power domains on SC8180x.
     15
     16  See also:
     17  - dt-bindings/clock/qcom,gcc-sc8180x.h
     18
     19properties:
     20  compatible:
     21    const: qcom,gcc-sc8180x
     22
     23  clocks:
     24    items:
     25      - description: Board XO source
     26      - description: Board active XO source
     27      - description: Sleep clock source
     28
     29  clock-names:
     30    items:
     31      - const: bi_tcxo
     32      - const: bi_tcxo_ao
     33      - const: sleep_clk
     34
     35  '#clock-cells':
     36    const: 1
     37
     38  '#reset-cells':
     39    const: 1
     40
     41  '#power-domain-cells':
     42    const: 1
     43
     44  reg:
     45    maxItems: 1
     46
     47  protected-clocks:
     48    description:
     49      Protected clock specifier list as per common clock binding.
     50
     51required:
     52  - compatible
     53  - clocks
     54  - clock-names
     55  - reg
     56  - '#clock-cells'
     57  - '#reset-cells'
     58  - '#power-domain-cells'
     59
     60additionalProperties: false
     61
     62examples:
     63  - |
     64    #include <dt-bindings/clock/qcom,rpmh.h>
     65    clock-controller@100000 {
     66      compatible = "qcom,gcc-sc8180x";
     67      reg = <0x00100000 0x1f0000>;
     68      clocks = <&rpmhcc RPMH_CXO_CLK>,
     69               <&rpmhcc RPMH_CXO_CLK_A>,
     70               <&sleep_clk>;
     71      clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
     72      #clock-cells = <1>;
     73      #reset-cells = <1>;
     74      #power-domain-cells = <1>;
     75    };
     76...