cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,sc7180-lpasscorecc.yaml (2442B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,sc7180-lpasscorecc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm LPASS Core Clock Controller Binding for SC7180
      8
      9maintainers:
     10  - Taniya Das <tdas@codeaurora.org>
     11
     12description: |
     13  Qualcomm LPASS core clock control module which supports the clocks and
     14  power domains on SC7180.
     15
     16  See also:
     17  - dt-bindings/clock/qcom,lpasscorecc-sc7180.h
     18
     19properties:
     20  compatible:
     21    enum:
     22      - qcom,sc7180-lpasshm
     23      - qcom,sc7180-lpasscorecc
     24
     25  clocks:
     26    items:
     27      - description: gcc_lpass_sway clock from GCC
     28      - description: Board XO source
     29
     30  clock-names:
     31    items:
     32      - const: iface
     33      - const: bi_tcxo
     34
     35  power-domains:
     36    maxItems: 1
     37
     38  '#clock-cells':
     39    const: 1
     40
     41  '#power-domain-cells':
     42    const: 1
     43
     44  reg:
     45    minItems: 1
     46    items:
     47      - description: lpass core cc register
     48      - description: lpass audio cc register
     49
     50  reg-names:
     51    items:
     52      - const: lpass_core_cc
     53      - const: lpass_audio_cc
     54
     55if:
     56  properties:
     57    compatible:
     58      contains:
     59        const: qcom,sc7180-lpasshm
     60then:
     61  properties:
     62    reg:
     63      maxItems: 1
     64
     65else:
     66  properties:
     67    reg:
     68      minItems: 2
     69
     70required:
     71  - compatible
     72  - reg
     73  - clocks
     74  - clock-names
     75  - '#clock-cells'
     76  - '#power-domain-cells'
     77
     78additionalProperties: false
     79
     80examples:
     81  - |
     82    #include <dt-bindings/clock/qcom,rpmh.h>
     83    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
     84    #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
     85    clock-controller@63000000 {
     86      compatible = "qcom,sc7180-lpasshm";
     87      reg = <0x63000000 0x28>;
     88      clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, <&rpmhcc RPMH_CXO_CLK>;
     89      clock-names = "iface", "bi_tcxo";
     90      #clock-cells = <1>;
     91      #power-domain-cells = <1>;
     92    };
     93
     94  - |
     95    #include <dt-bindings/clock/qcom,rpmh.h>
     96    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
     97    #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
     98    clock-controller@62d00000 {
     99      compatible = "qcom,sc7180-lpasscorecc";
    100      reg = <0x62d00000 0x50000>, <0x62780000 0x30000>;
    101      reg-names = "lpass_core_cc", "lpass_audio_cc";
    102      clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, <&rpmhcc RPMH_CXO_CLK>;
    103      clock-names = "iface", "bi_tcxo";
    104      power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
    105      #clock-cells = <1>;
    106      #power-domain-cells = <1>;
    107    };
    108...