cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,sc7280-lpasscc.yaml (1459B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm LPASS Core Clock Controller Binding for SC7280
      8
      9maintainers:
     10  - Taniya Das <tdas@codeaurora.org>
     11
     12description: |
     13  Qualcomm LPASS core clock control module which supports the clocks and
     14  power domains on SC7280.
     15
     16  See also:
     17  - dt-bindings/clock/qcom,lpass-sc7280.h
     18
     19properties:
     20  compatible:
     21    enum:
     22      - qcom,sc7280-lpasscc
     23
     24  clocks:
     25    items:
     26      - description: gcc_cfg_noc_lpass_clk from GCC
     27
     28  clock-names:
     29    items:
     30      - const: iface
     31
     32  '#clock-cells':
     33    const: 1
     34
     35  reg:
     36    items:
     37      - description: LPASS qdsp6ss register
     38      - description: LPASS top-cc register
     39      - description: LPASS cc register
     40
     41  reg-names:
     42    items:
     43      - const: qdsp6ss
     44      - const: top_cc
     45      - const: cc
     46
     47required:
     48  - compatible
     49  - reg
     50  - clocks
     51  - clock-names
     52  - '#clock-cells'
     53
     54additionalProperties: false
     55
     56examples:
     57  - |
     58    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
     59    #include <dt-bindings/clock/qcom,lpass-sc7280.h>
     60    clock-controller@3000000 {
     61      compatible = "qcom,sc7280-lpasscc";
     62      reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>;
     63      reg-names = "qdsp6ss", "top_cc", "cc";
     64      clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
     65      clock-names = "iface";
     66      #clock-cells = <1>;
     67    };
     68...