cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom,sdm845-camcc.yaml (1271B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/qcom,sdm845-camcc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Camera Clock & Reset Controller Binding for SDM845
      8
      9maintainers:
     10  - Bjorn Andersson <bjorn.andersson@linaro.org>
     11
     12description: |
     13  Qualcomm camera clock control module which supports the clocks, resets and
     14  power domains on SDM845.
     15
     16  See also dt-bindings/clock/qcom,camcc-sm845.h
     17
     18properties:
     19  compatible:
     20    const: qcom,sdm845-camcc
     21
     22  clocks:
     23    items:
     24      - description: Board XO source
     25
     26  clock-names:
     27    items:
     28      - const: bi_tcxo
     29
     30  '#clock-cells':
     31    const: 1
     32
     33  '#reset-cells':
     34    const: 1
     35
     36  '#power-domain-cells':
     37    const: 1
     38
     39  reg:
     40    maxItems: 1
     41
     42required:
     43  - compatible
     44  - reg
     45  - clocks
     46  - clock-names
     47  - '#clock-cells'
     48  - '#reset-cells'
     49  - '#power-domain-cells'
     50
     51additionalProperties: false
     52
     53examples:
     54  - |
     55    #include <dt-bindings/clock/qcom,rpmh.h>
     56    clock-controller@ad00000 {
     57      compatible = "qcom,sdm845-camcc";
     58      reg = <0x0ad00000 0x10000>;
     59      clocks = <&rpmhcc RPMH_CXO_CLK>;
     60      clock-names = "bi_tcxo";
     61      #clock-cells = <1>;
     62      #reset-cells = <1>;
     63      #power-domain-cells = <1>;
     64    };
     65...