cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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samsung,exynos-clock.yaml (1351B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/samsung,exynos-clock.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Samsung Exynos SoC clock controller
      8
      9maintainers:
     10  - Chanwoo Choi <cw00.choi@samsung.com>
     11  - Krzysztof Kozlowski <krzk@kernel.org>
     12  - Sylwester Nawrocki <s.nawrocki@samsung.com>
     13  - Tomasz Figa <tomasz.figa@gmail.com>
     14
     15description: |
     16  All available clocks are defined as preprocessor macros in
     17  dt-bindings/clock/ headers.
     18
     19properties:
     20  compatible:
     21    oneOf:
     22      - enum:
     23          - samsung,exynos3250-cmu
     24          - samsung,exynos3250-cmu-dmc
     25          - samsung,exynos3250-cmu-isp
     26          - samsung,exynos4210-clock
     27          - samsung,exynos4412-clock
     28          - samsung,exynos5250-clock
     29      - items:
     30          - enum:
     31              - samsung,exynos5420-clock
     32              - samsung,exynos5800-clock
     33          - const: syscon
     34
     35  clocks:
     36    minItems: 1
     37    maxItems: 4
     38
     39  "#clock-cells":
     40    const: 1
     41
     42  reg:
     43    maxItems: 1
     44
     45required:
     46  - compatible
     47  - "#clock-cells"
     48  - reg
     49
     50additionalProperties: false
     51
     52examples:
     53  - |
     54    #include <dt-bindings/clock/exynos5250.h>
     55    clock: clock-controller@10010000 {
     56        compatible = "samsung,exynos5250-clock";
     57        reg = <0x10010000 0x30000>;
     58        #clock-cells = <1>;
     59    };