cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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samsung,exynos850-clock.yaml (5785B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Samsung Exynos850 SoC clock controller
      8
      9maintainers:
     10  - Sam Protsenko <semen.protsenko@linaro.org>
     11  - Chanwoo Choi <cw00.choi@samsung.com>
     12  - Krzysztof Kozlowski <krzk@kernel.org>
     13  - Sylwester Nawrocki <s.nawrocki@samsung.com>
     14  - Tomasz Figa <tomasz.figa@gmail.com>
     15
     16description: |
     17  Exynos850 clock controller is comprised of several CMU units, generating
     18  clocks for different domains. Those CMU units are modeled as separate device
     19  tree nodes, and might depend on each other. Root clocks in that clock tree are
     20  two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
     21  clocks must be defined as fixed-rate clocks in dts.
     22
     23  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
     24  dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
     25
     26  Each clock is assigned an identifier and client nodes can use this identifier
     27  to specify the clock which they consume. All clocks available for usage
     28  in clock consumer nodes are defined as preprocessor macros in
     29  'dt-bindings/clock/exynos850.h' header.
     30
     31properties:
     32  compatible:
     33    enum:
     34      - samsung,exynos850-cmu-top
     35      - samsung,exynos850-cmu-apm
     36      - samsung,exynos850-cmu-cmgp
     37      - samsung,exynos850-cmu-core
     38      - samsung,exynos850-cmu-dpu
     39      - samsung,exynos850-cmu-hsi
     40      - samsung,exynos850-cmu-peri
     41
     42  clocks:
     43    minItems: 1
     44    maxItems: 5
     45
     46  clock-names:
     47    minItems: 1
     48    maxItems: 5
     49
     50  "#clock-cells":
     51    const: 1
     52
     53  reg:
     54    maxItems: 1
     55
     56allOf:
     57  - if:
     58      properties:
     59        compatible:
     60          contains:
     61            const: samsung,exynos850-cmu-top
     62
     63    then:
     64      properties:
     65        clocks:
     66          items:
     67            - description: External reference clock (26 MHz)
     68
     69        clock-names:
     70          items:
     71            - const: oscclk
     72
     73  - if:
     74      properties:
     75        compatible:
     76          contains:
     77            const: samsung,exynos850-cmu-apm
     78
     79    then:
     80      properties:
     81        clocks:
     82          items:
     83            - description: External reference clock (26 MHz)
     84            - description: CMU_APM bus clock (from CMU_TOP)
     85
     86        clock-names:
     87          items:
     88            - const: oscclk
     89            - const: dout_clkcmu_apm_bus
     90
     91  - if:
     92      properties:
     93        compatible:
     94          contains:
     95            const: samsung,exynos850-cmu-cmgp
     96
     97    then:
     98      properties:
     99        clocks:
    100          items:
    101            - description: External reference clock (26 MHz)
    102            - description: CMU_CMGP bus clock (from CMU_APM)
    103
    104        clock-names:
    105          items:
    106            - const: oscclk
    107            - const: gout_clkcmu_cmgp_bus
    108
    109  - if:
    110      properties:
    111        compatible:
    112          contains:
    113            const: samsung,exynos850-cmu-core
    114
    115    then:
    116      properties:
    117        clocks:
    118          items:
    119            - description: External reference clock (26 MHz)
    120            - description: CMU_CORE bus clock (from CMU_TOP)
    121            - description: CCI clock (from CMU_TOP)
    122            - description: eMMC clock (from CMU_TOP)
    123            - description: SSS clock (from CMU_TOP)
    124
    125        clock-names:
    126          items:
    127            - const: oscclk
    128            - const: dout_core_bus
    129            - const: dout_core_cci
    130            - const: dout_core_mmc_embd
    131            - const: dout_core_sss
    132
    133  - if:
    134      properties:
    135        compatible:
    136          contains:
    137            const: samsung,exynos850-cmu-dpu
    138
    139    then:
    140      properties:
    141        clocks:
    142          items:
    143            - description: External reference clock (26 MHz)
    144            - description: DPU clock (from CMU_TOP)
    145
    146        clock-names:
    147          items:
    148            - const: oscclk
    149            - const: dout_dpu
    150
    151  - if:
    152      properties:
    153        compatible:
    154          contains:
    155            const: samsung,exynos850-cmu-hsi
    156
    157    then:
    158      properties:
    159        clocks:
    160          items:
    161            - description: External reference clock (26 MHz)
    162            - description: External RTC clock (32768 Hz)
    163            - description: CMU_HSI bus clock (from CMU_TOP)
    164            - description: SD card clock (from CMU_TOP)
    165            - description: "USB 2.0 DRD clock (from CMU_TOP)"
    166
    167        clock-names:
    168          items:
    169            - const: oscclk
    170            - const: rtcclk
    171            - const: dout_hsi_bus
    172            - const: dout_hsi_mmc_card
    173            - const: dout_hsi_usb20drd
    174
    175  - if:
    176      properties:
    177        compatible:
    178          contains:
    179            const: samsung,exynos850-cmu-peri
    180
    181    then:
    182      properties:
    183        clocks:
    184          items:
    185            - description: External reference clock (26 MHz)
    186            - description: CMU_PERI bus clock (from CMU_TOP)
    187            - description: UART clock (from CMU_TOP)
    188            - description: Parent clock for HSI2C and SPI (from CMU_TOP)
    189
    190        clock-names:
    191          items:
    192            - const: oscclk
    193            - const: dout_peri_bus
    194            - const: dout_peri_uart
    195            - const: dout_peri_ip
    196
    197required:
    198  - compatible
    199  - "#clock-cells"
    200  - clocks
    201  - clock-names
    202  - reg
    203
    204additionalProperties: false
    205
    206examples:
    207  # Clock controller node for CMU_PERI
    208  - |
    209    #include <dt-bindings/clock/exynos850.h>
    210
    211    cmu_peri: clock-controller@10030000 {
    212        compatible = "samsung,exynos850-cmu-peri";
    213        reg = <0x10030000 0x8000>;
    214        #clock-cells = <1>;
    215
    216        clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
    217                 <&cmu_top CLK_DOUT_PERI_UART>,
    218                 <&cmu_top CLK_DOUT_PERI_IP>;
    219        clock-names = "oscclk", "dout_peri_bus",
    220                      "dout_peri_uart", "dout_peri_ip";
    221    };
    222
    223...