cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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st,stm32mp1-rcc.yaml (3129B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Reset Clock Controller Binding
      8
      9maintainers:
     10  - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
     11
     12description: |
     13  The RCC IP is both a reset and a clock controller.
     14  RCC makes also power management (resume/supend and wakeup interrupt).
     15  Please also refer to reset.txt for common reset controller binding usage.
     16
     17  This binding uses common clock bindings
     18  Documentation/devicetree/bindings/clock/clock-bindings.txt
     19
     20  Specifying clocks
     21  =================
     22
     23  All available clocks are defined as preprocessor macros in
     24  dt-bindings/clock/stm32mp1-clks.h header and can be used in device
     25  tree sources.
     26
     27  Specifying softreset control of devices
     28  =======================================
     29
     30  Device nodes should specify the reset channel required in their "resets"
     31  property, containing a phandle to the reset device node and an index specifying
     32  which channel to use.
     33  The index is the bit number within the RCC registers bank, starting from RCC
     34  base address.
     35  It is calculated as: index = register_offset / 4 * 32 + bit_offset.
     36  Where bit_offset is the bit offset within the register.
     37
     38  For example on STM32MP1, for LTDC reset:
     39     ltdc = APB4_RSTSETR_offset / 4 * 32 + LTDC_bit_offset
     40          = 0x180 / 4 * 32 + 0 = 3072
     41
     42  The list of valid indices for STM32MP1 is available in:
     43  include/dt-bindings/reset-controller/stm32mp1-resets.h
     44  include/dt-bindings/reset-controller/stm32mp13-resets.h
     45
     46  This file implements defines like:
     47  #define LTDC_R	3072
     48
     49properties:
     50  "#clock-cells":
     51    const: 1
     52
     53  "#reset-cells":
     54    const: 1
     55
     56  compatible:
     57    items:
     58      - enum:
     59          - st,stm32mp1-rcc-secure
     60          - st,stm32mp1-rcc
     61          - st,stm32mp13-rcc
     62      - const: syscon
     63  clocks: true
     64  clock-names: true
     65
     66  reg:
     67    maxItems: 1
     68
     69required:
     70  - "#clock-cells"
     71  - "#reset-cells"
     72  - compatible
     73  - reg
     74
     75if:
     76  properties:
     77    compatible:
     78      contains:
     79        enum:
     80          - st,stm32mp1-rcc-secure
     81then:
     82  properties:
     83    clocks:
     84      description: Specifies oscillators.
     85      maxItems: 5
     86
     87    clock-names:
     88      items:
     89        - const: hse
     90        - const: hsi
     91        - const: csi
     92        - const: lse
     93        - const: lsi
     94  required:
     95    - clocks
     96    - clock-names
     97else:
     98  properties:
     99    clocks:
    100      description:
    101        Specifies the external RX clock for ethernet MAC.
    102      maxItems: 1
    103
    104    clock-names:
    105      const: ETH_RX_CLK/ETH_REF_CLK
    106
    107additionalProperties: false
    108
    109examples:
    110  - |
    111    #include <dt-bindings/clock/stm32mp1-clks.h>
    112    rcc: rcc@50000000 {
    113        compatible = "st,stm32mp1-rcc-secure", "syscon";
    114        reg = <0x50000000 0x1000>;
    115        #clock-cells = <1>;
    116        #reset-cells = <1>;
    117        clock-names = "hse", "hsi", "csi", "lse", "lsi";
    118        clocks = <&scmi_clk CK_SCMI_HSE>,
    119                 <&scmi_clk CK_SCMI_HSI>,
    120                 <&scmi_clk CK_SCMI_CSI>,
    121                 <&scmi_clk CK_SCMI_LSE>,
    122                 <&scmi_clk CK_SCMI_LSI>;
    123    };
    124...