cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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starfive,jh7100-clkgen.yaml (1367B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/starfive,jh7100-clkgen.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: StarFive JH7100 Clock Generator
      8
      9maintainers:
     10  - Geert Uytterhoeven <geert@linux-m68k.org>
     11  - Emil Renner Berthing <kernel@esmil.dk>
     12
     13properties:
     14  compatible:
     15    const: starfive,jh7100-clkgen
     16
     17  reg:
     18    maxItems: 1
     19
     20  clocks:
     21    items:
     22      - description: Main clock source (25 MHz)
     23      - description: Application-specific clock source (12-27 MHz)
     24      - description: RMII reference clock (50 MHz)
     25      - description: RGMII RX clock (125 MHz)
     26
     27  clock-names:
     28    items:
     29      - const: osc_sys
     30      - const: osc_aud
     31      - const: gmac_rmii_ref
     32      - const: gmac_gr_mii_rxclk
     33
     34  '#clock-cells':
     35    const: 1
     36    description:
     37      See <dt-bindings/clock/starfive-jh7100.h> for valid indices.
     38
     39required:
     40  - compatible
     41  - reg
     42  - clocks
     43  - clock-names
     44  - '#clock-cells'
     45
     46additionalProperties: false
     47
     48examples:
     49  - |
     50    clock-controller@11800000 {
     51            compatible = "starfive,jh7100-clkgen";
     52            reg = <0x11800000 0x10000>;
     53            clocks = <&osc_sys>, <&osc_aud>, <&gmac_rmii_ref>, <&gmac_gr_mii_rxclk>;
     54            clock-names = "osc_sys", "osc_aud", "gmac_rmii_ref", "gmac_gr_mii_rxclk";
     55            #clock-cells = <1>;
     56    };