cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti,sci-clk.yaml (1538B)


      1# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/ti,sci-clk.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: TI-SCI clock controller node bindings
      8
      9maintainers:
     10  - Nishanth Menon <nm@ti.com>
     11
     12description: |
     13  Some TI SoCs contain a system controller (like the Power Management Micro
     14  Controller (PMMC) on Keystone 66AK2G SoC) that are responsible for controlling
     15  the state of the various hardware modules present on the SoC. Communication
     16  between the host processor running an OS and the system controller happens
     17  through a protocol called TI System Control Interface (TI-SCI protocol).
     18
     19  This clock controller node uses the TI SCI protocol to perform various clock
     20  management of various hardware modules (devices) present on the SoC. This
     21  node must be a child node of the associated TI-SCI system controller node.
     22
     23properties:
     24  $nodename:
     25    pattern: "^clock-controller$"
     26
     27  compatible:
     28    const: ti,k2g-sci-clk
     29
     30  "#clock-cells":
     31    const: 2
     32    description:
     33      The two cells represent values that the TI-SCI controller defines.
     34
     35      The first cell should contain the device ID.
     36
     37      The second cell should contain the clock ID.
     38
     39      Please see  http://processors.wiki.ti.com/index.php/TISCI for
     40      protocol documentation for the values to be used for different devices.
     41
     42additionalProperties: false
     43
     44examples:
     45  - |
     46    k3_clks: clock-controller {
     47        compatible = "ti,k2g-sci-clk";
     48        #clock-cells = <2>;
     49    };