cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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interface.txt (2062B)


      1Binding for Texas Instruments interface clock.
      2
      3Binding status: Unstable - ABI compatibility may be broken in the future
      4
      5This binding uses the common clock binding[1]. This clock is
      6quite much similar to the basic gate-clock [2], however,
      7it supports a number of additional features, including
      8companion clock finding (match corresponding functional gate
      9clock) and hardware autoidle enable / disable.
     10
     11[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
     12[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt
     13
     14Required properties:
     15- compatible : shall be one of:
     16  "ti,omap3-interface-clock" - basic OMAP3 interface clock
     17  "ti,omap3-no-wait-interface-clock" - interface clock which has no hardware
     18				       capability for waiting clock to be ready
     19  "ti,omap3-hsotgusb-interface-clock" - interface clock with USB specific HW
     20					handling
     21  "ti,omap3-dss-interface-clock" - interface clock with DSS specific HW handling
     22  "ti,omap3-ssi-interface-clock" - interface clock with SSI specific HW handling
     23  "ti,am35xx-interface-clock" - interface clock with AM35xx specific HW handling
     24  "ti,omap2430-interface-clock" - interface clock with OMAP2430 specific HW
     25				  handling
     26- #clock-cells : from common clock binding; shall be set to 0
     27- clocks : link to phandle of parent clock
     28- reg : base address for the control register
     29
     30Optional properties:
     31- clock-output-names : from common clock binding.
     32- ti,bit-shift : bit shift for the bit enabling/disabling the clock (default 0)
     33
     34Examples:
     35	aes1_ick: aes1_ick@48004a14 {
     36		#clock-cells = <0>;
     37		compatible = "ti,omap3-interface-clock";
     38		clocks = <&security_l4_ick2>;
     39		reg = <0x48004a14 0x4>;
     40		ti,bit-shift = <3>;
     41	};
     42
     43	cam_ick: cam_ick@48004f10 {
     44		#clock-cells = <0>;
     45		compatible = "ti,omap3-no-wait-interface-clock";
     46		clocks = <&l4_ick>;
     47		reg = <0x48004f10 0x4>;
     48		ti,bit-shift = <0>;
     49	};
     50
     51	ssi_ick_3430es2: ssi_ick_3430es2@48004a10 {
     52		#clock-cells = <0>;
     53		compatible = "ti,omap3-ssi-interface-clock";
     54		clocks = <&ssi_l4_ick>;
     55		reg = <0x48004a10 0x4>;
     56		ti,bit-shift = <0>;
     57	};