cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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toshiba,tmpv770x-pipllct.yaml (1157B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pipllct.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Toshiba Visconti5 TMPV770X PLL Controller Device Tree Bindings
      8
      9maintainers:
     10  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
     11
     12description:
     13  Toshia Visconti5 PLL controller which supports the PLLs on TMPV770X.
     14
     15properties:
     16  compatible:
     17    const: toshiba,tmpv7708-pipllct
     18
     19  reg:
     20    maxItems: 1
     21
     22  '#clock-cells':
     23    const: 1
     24
     25  clocks:
     26    description: External reference clock (OSC2)
     27    maxItems: 1
     28
     29required:
     30  - compatible
     31  - reg
     32  - "#clock-cells"
     33  - clocks
     34
     35additionalProperties: false
     36
     37examples:
     38  - |
     39
     40    osc2_clk: osc2-clk {
     41      compatible = "fixed-clock";
     42      clock-frequency = <20000000>;
     43      #clock-cells = <0>;
     44    };
     45
     46    soc {
     47        #address-cells = <2>;
     48        #size-cells = <2>;
     49
     50        pipllct: clock-controller@24220000 {
     51            compatible = "toshiba,tmpv7708-pipllct";
     52            reg = <0 0x24220000 0 0x820>;
     53            #clock-cells = <1>;
     54            clocks = <&osc2_clk>;
     55        };
     56    };
     57...