cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nvidia,tegra20-cpufreq.txt (1312B)

      1Binding for NVIDIA Tegra20 CPUFreq
      2==================================
      3
      4Required properties:
      5- clocks: Must contain an entry for the CPU clock.
      6  See ../clocks/clock-bindings.txt for details.
      7- operating-points-v2: See ../bindings/opp/opp-v2.yaml for details.
      8- #cooling-cells: Should be 2. See ../thermal/thermal-cooling-devices.yaml for details.
      9
     10For each opp entry in 'operating-points-v2' table:
     11- opp-supported-hw: Two bitfields indicating:
     12	On Tegra20:
     13	1. CPU process ID mask
     14	2. SoC speedo ID mask
     15
     16	On Tegra30:
     17	1. CPU process ID mask
     18	2. CPU speedo ID mask
     19
     20	A bitwise AND is performed against these values and if any bit
     21	matches, the OPP gets enabled.
     22
     23- opp-microvolt: CPU voltage triplet.
     24
     25Optional properties:
     26- cpu-supply: Phandle to the CPU power supply.
     27
     28Example:
     29	regulators {
     30		cpu_reg: regulator0 {
     31			regulator-name = "vdd_cpu";
     32		};
     33	};
     34
     35	cpu0_opp_table: opp_table0 {
     36		compatible = "operating-points-v2";
     37
     38		opp@456000000 {
     39			clock-latency-ns = <125000>;
     40			opp-microvolt = <825000 825000 1125000>;
     41			opp-supported-hw = <0x03 0x0001>;
     42			opp-hz = /bits/ 64 <456000000>;
     43		};
     44
     45		...
     46	};
     47
     48	cpus {
     49		cpu@0 {
     50			compatible = "arm,cortex-a9";
     51			clocks = <&tegra_car TEGRA20_CLK_CCLK>;
     52			operating-points-v2 = <&cpu0_opp_table>;
     53			cpu-supply = <&cpu_reg>;
     54			#cooling-cells = <2>;
     55		};
     56	};