cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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atmel,at91sam9g46-tdes.yaml (1421B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-tdes.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: Atmel Triple Data Encryption Standard (TDES) HW cryptographic accelerator
      9
     10maintainers:
     11  - Tudor Ambarus <tudor.ambarus@microchip.com>
     12
     13properties:
     14  compatible:
     15    const: atmel,at91sam9g46-tdes
     16
     17  reg:
     18    maxItems: 1
     19
     20  interrupts:
     21    maxItems: 1
     22
     23  clocks:
     24    maxItems: 1
     25
     26  clock-names:
     27    const: tdes_clk
     28
     29  dmas:
     30    items:
     31      - description: TX DMA Channel
     32      - description: RX DMA Channel
     33
     34  dma-names:
     35    items:
     36      - const: tx
     37      - const: rx
     38
     39required:
     40  - compatible
     41  - reg
     42  - interrupts
     43  - clocks
     44  - clock-names
     45
     46additionalProperties: false
     47
     48examples:
     49  - |
     50    #include <dt-bindings/interrupt-controller/irq.h>
     51    #include <dt-bindings/interrupt-controller/arm-gic.h>
     52    #include <dt-bindings/clock/at91.h>
     53    #include <dt-bindings/dma/at91.h>
     54
     55    tdes: crypto@e2014000 {
     56      compatible = "atmel,at91sam9g46-tdes";
     57      reg = <0xe2014000 0x100>;
     58      interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
     59      clocks = <&pmc PMC_TYPE_PERIPHERAL 96>;
     60      clock-names = "tdes_clk";
     61      dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>,
     62             <&dma0 AT91_XDMAC_DT_PERID(53)>;
     63      dma-names = "tx", "rx";
     64    };