cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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brcm,spu-crypto.txt (830B)


      1The Broadcom Secure Processing Unit (SPU) hardware supports symmetric
      2cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware
      3blocks.
      4
      5Required properties:
      6- compatible: Should be one of the following:
      7  brcm,spum-crypto - for devices with SPU-M hardware
      8  brcm,spu2-crypto - for devices with SPU2 hardware
      9  brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3
     10  and Rabin Fingerprint support
     11  brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware
     12
     13- reg: Should contain SPU registers location and length.
     14- mboxes: The mailbox channel to be used to communicate with the SPU.
     15  Mailbox channels correspond to DMA rings on the device.
     16
     17Example:
     18	crypto@612d0000 {
     19		compatible = "brcm,spum-crypto";
     20		reg = <0 0x612d0000 0 0x900>;
     21		mboxes = <&pdc0 0>;
     22	};